Helge Haverkamp

Minimizing the electrical losses on the front side: Development of a selective emitter process from a single diffusion

In this paper we present latest results in the development of a process for the fabrication of a selective emitter structure on mono- and multicrystalline silicon solar cells. The process is based on an approach that was first introduced by Zerga et al. [1]. We have chosen a wet chemical route for an emitter etch back where the areas of the wafer that are intended for emitter metallization are shielded from etching by a screen printable etch barrier. The etch barrier is later removed by wet chemical etching. The process has yielded a gain in open circuit voltage of more than 1% and a gain in short circuit current of more than 2%. The overall efficiency gain was more than 0.3%abs due to slightly lower fill factor of the cells.

Investigation of the Internal Back Reflectance of Rear-Side Dielectric Stacks for c-Si Solar Cells

This paper addresses the calculation of internal back reflectance for various dielectrics that are used in rear-side passivated crystalline silicon solar cells. Optical modeling of various stack configurations is examined to explore the back-surface reflectance at the Si-dielectric interface for different film combinations and thicknesses as a function of wavelength and internal angle of incidence at the rear side. Specifically, configurations using aluminum oxide (AlOx), silicon nitride (SiNx), titanium dioxide (TiO2), and silicon dioxide (SiO2) were investigated with a focus on designing stack configurations that will also allow for high-quality passivation and are compatible with a high-volume manufacturing environment. In addition, samples were fabricated by plasma-enhanced and atmospheric pressure chemical vapor deposition of thin dielectric films onto polished and textured monocrystalline silicon wafers. Spectral reflectance curves of the samples are presented to supplement and validate the conclusions that are obtained from the optical modeling data.

Development of an In-Line Capable Sputtering Process of Silicon Nitride for Crystalline Silicon Solar Cells

The purpose of this work is to develop a high rate sputtering process for the deposition of silicon nitride antireflection coatings for crystalline silicon solar cells. Our goal is to achieve a cycle time that allows for the processing of single wafers without a reduction of the production line throughput. We have varied several processing parameters such as process gas composition and individual gas flows into the process chamber as well as different deposition rates. In order to assess the performance of the deposited layers with respect to their passivation quality complete cells were processed on monocrystalline Czochralski wafers (125x125 mm). We have found that the implementation of molecular hydrogen as a process gas has a detrimental effect on the passivation quality of the deposited layers. Furthermore, a clear influence of the sputtering rate on the overall cell performance can be seen. We have achieved a cell efficiency of 17.5% applying a standard screen printed process.