Herman Carlo Floresca

Toward the Controlled Synthesis of Hexagonal Boron Nitride Films

Atomically smooth hexagonal boron nitride (h-BN) layers have very useful properties and thus potential applications for protective coatings, deep ultraviolet (DUV) emitters, and as a dielectric for nanoelectronics devices. In this paper, we report on the growth of h-BN by a low-pressure chemical vapor deposition (LPCVD) process using diborane and ammonia as the gas precursors. The use of LPCVD allows synthesis of h-BN with a controlled number of layers defined by the growth conditions, temperature, time, and gas partial pressure. Furthermore, few-layer h-BN was also grown by a sequential growth method, and insights into the growth mechanism are described, thus forming the basis of future growth of h-BN by atomic layer epitaxy.

Quantum Confinement Induced Performance Enhancement in Sub-5-nm Lithographic Si Nanowire Transistors

We demonstrate lithographically fabricated Si nanowire field effect transistors (FETs) with long Si nanowires of tiny cross sectional size (∼3-5 nm) exhibiting high performance without employing complementarily doped junctions or high channel doping. These nanowire FETs show high peak hole mobility (as high as over 1200 cm(2)/(V s)), current density, and drive current as well as low drain leakage current and high on/off ratio. Comparison of nanowire FETs with nanobelt FETs shows enhanced performance is a result of significant quantum confinement in these 3-5 nm wires. This study suggests simple (no additional doping) FETs using tiny top-down nanowires can deliver high performance for potential impact on both CMOS scaling and emerging applications such as biosensing.

Room-Temperature Quantum Confinement Effects in Transport Properties of Ultrathin Si Nanowire Field-Effect Transistors

Quantum confinement of carriers has a substantial impact on nanoscale device operations. We present electrical transport analysis for lithographically fabricated sub-5 nm thick Si nanowire field-effect transistors and show that confinement-induced quantum oscillations prevail at 300 K. Our results discern the basis of recent observations of performance enhancement in ultrathin Si nanowire field-effect transistors and provide direct experimental evidence for theoretical predictions of enhanced carrier mobility in strongly confined nanowire devices.

Fabrication of complex three-dimensional nanostructures using focused ion beam and nanomanipulation

In this article, the authors present a fabrication/assembly method that grants the ability to create complex three-dimensional (3D) nanostructures. This method uses a combination of micro- and nanomachining capabilities with a focused ion beam (FIB) and six degrees of freedom (DOFs) 3D nanomanipulator. A dual beam of scanning electron microscope and a FIB system was used to ion beam mill a silicon piece in order to create tethered structures. Various 3D structures were further processed by the ion beam milling process and platinum chemical vapor deposition unit to form sub-100-nm features. The gas assisted deposition system was used to create a convex shape on the nanoairplane using the gray scale image digital patterning system. The six DOFs nanomanipulator was used to pick, rotate, and place the nanoflags onto the FIB defined Texas and United States maps made by the FIB. In addition, a multiwalled carbon nanotube was used as a flag pole, and then it was attached to a scanning probe microscope tip. The t...

Effects of metal gate-induced strain on the performance of metal-oxide-semiconductor field effect transistors with titanium nitride gate electrode and hafnium oxide dielectric

In this letter, the authors investigate the strain induced by titanium nitride (TiN) electrode and effective work function (EWF) tuning for metal-oxide-semiconductor field effect transistors (MOSFETs). Scaling of TiN thickness was found to be effective both in increasing tensile stress on Si substrates and in lowering the EWF of metal gate n-MOSFETs. The device with 3nm TiN as a gate electrode showed favorable threshold voltage (Vth) for n-MOSFETs as well as higher channel electron mobility by 17% compared to the device with 20nm TiN film.

Effects of Film Stress Modulation Using TiN Metal Gate on Stress Engineering and Its Impact on Device Characteristics in Metal Gate/High-

In this letter, the effects of TiN-induced strain engineering on device characteristics for a metal gate/high-k silicon-on-insulator fin-shaped field-effect transistors were studied. From a convergent-beam electron-diffraction analysis and simulation study, a 3-nm TiN electrode was found to lead to significantly higher tensile stress on the Si substrate than a 20-nm TiN electrode. This high stress-induced fast bulk carrier generation results in the transient current-time characteristics. Therefore, 3- and 20-nm TiN electrodes are the excellent choice for nMOSFETs and pMOSFETs, respectively, which is from the standpoint of strain engineering, threshold voltage (Vth), and performance. Due to the metal-induced strain, Idsat improvements of 15% and 12% for nMOSFETs and pMOSFETs, respectively, were achieved.

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Three spin-on dielectric (SOD) shallow trench isolation (STI) structures were studied: nitride liner, nitride liner with anisotropic amorphous silicon (a-Si) bottom fill, and nitride liner with thin conformal a-Si. All samples received the same SOD material conditions and final thermal oxidation. Convergent beam electron diffraction determined the induced STI strain and has been shown to accurately measure strain on 60nm active areas. The results revealed effects that the liners have in balancing stress induced by volume shrinkage of the SOD. The conformal a-Si liner decreased the shear force that causes dislocations that form at the bottom corners of STI structures.

Dielectric SOI FinFETs

Hydrogenated amorphous silicon nanowire field-effect transistors (a-Si:H NWFETs) with Schottky source/drain junctions have been fabricated with a simple process involving maximum temperatures of 250 °C. Electrical characteristics of devices with various numbers of wires and different linewidths are analyzed. The NWFETs with small effective channel width demonstrate improved subthreshold slope and field-effect mobility as compared to wider devices. Additionally, the on-current scales linearly with effective channel width. Possible explanations for these effects are discussed, and applications of a-Si:H NWFETs are presented.

Shallow trench isolation liners and their role in reducing lattice strains

Schottky barrier height tuning is reported from the insertion of thin layers of AlOx and SiO2 at the interface between tantalum nitride and p-type silicon. The magnitude of the change in the barrier height is found to be dependent on the conditions of AlOx and SiO2 formation. The largest change in barrier height is over 350 meV and correlates well with the intrinsic dipole found at this interface. These findings are then interpreted using a model of the dipole formation at the high-κ and SiO2 interface. The application of these findings for low resistance contacts as well as options to achieve greater performance are discussed.

Hydrogenated amorphous silicon nanowire transistors with Schottky barrier source/drain junctions

Carbon nano structures have been of great interest for use in future electronic devices due to their noble properties. Recently, single to few layers of carbon sheets (graphenes) have emerged as a promising candidate for nano electric devices due to its high mobility, high saturation velocity for both electrons and holes, stable crystal structure, and ultrathin layer thickness [1]. In addition, a monolayer of graphene has a planar honeycomb crystal structure with sp bonding allowing the adoption of highly developed CMOS topdown processes. The best carrier mobility reported to date is up to 200,000 cm/V·s [2]. Device fabrication and characteristics improvements are main issues for graphene related research. However, elucidation the atomic structure is also critical since its properties are exceptionally sensitive to lattice defects and edge structures [3]. In this study, the atomic structure of a graphene layer was investigated by HRTEM to provide clues for the electronic behavior of the film.