Herwig Hahn

Recessed-Gate Enhancement-Mode AlGaN/GaN Heterostructure Field-Effect Transistors on Si with Record DC Performance

Enhancement-mode devices are in the centre of current research on group-III nitride transistors. The realisation of high-performance enhancement-mode transistors via gate recessing requires damage-free processing. We report on enhancement-mode AlGaN/GaN-on-Si heterostructure field-effect transistors (HFETs) fabricated with a damage-free digital etch technique. The threshold voltage (Vth) achieved is as high as +0.5 V. For AlGaN/GaN-on-Si HFETs, a record extrinsic transconductance (gm) of 420 mS/mm and a record maximum drain current Idmax of 500 mA/mm have been demonstrated. Furthermore, proper turn-off characteristics have been realised. Pulsed I–V characteristics reveal nearly no current collapse.

p-Channel Enhancement and Depletion Mode GaN-Based HFETs With Quaternary Backbarriers

Within the last years, III-nitride-based devices have been demonstrated with exceptional performance. There is, however, a severe lack of knowledge when it comes fabrication of p-channel devices. p-Channel heterostructure field-effect transistors (HFETs) could open the way for nitride-based complementary logic. Here, a comprehensive study of enhancement and depletion mode p-channel GaN/AlInGaN HFETs is performed. The influence of a highly p-doped GaN cap layer on device performance is investigated. Gate recessing and changes in composition of the backbarrier are analyzed. ON/OFF ratios of up to 108 and subthreshold swings of about 75 mV/decade are achieved.

First polarization-engineered compressively strained AlInGaN barrier enhancement-mode MISHFET

One current focus of research is the realization of GaN-based enhancement-mode devices. A novel approach for the realization of enhancement-mode behaviour is the utilization of polarization matching between the barrier and the GaN buffer. Yet, the utilization of a quaternary barrier combining polarization engineering together with a large conduction band offset has not been demonstrated so far. Here, epitaxially grown, compressively strained AlInGaN is applied as a nearly polarization-matched barrier layer on GaN resulting in enhancement-mode operation. The insulated-gate devices are fabricated gate-first with Al2O3 as gate dielectric. Passivated metal insulator semiconductor heterostructure field effect transistors yielded threshold voltages (Vth) of up to +1 V. The devices withstand negative and positive gate-biased stress and a positive Vth is maintained even after long-time negative bias stress.

The effect of the inversion channel at the AlN/Si interface on the vertical breakdown characteristics of GaN-based devices

GaN-on-Si transistors attract increasing interest for power applications. However, the breakdown behavior of such devices remains below theoretical expectations, for which the Si substrate is typically made responsible. In this work, the effect of the thickness of an aluminum nitride buffer layer on the vertical breakdown voltage, measured relative to a grounded silicon substrate, has been investigated. A voltage-polarity-dependent breakdown mechanism has been observed. It has been found that the breakdown in the positive bias voltage regime is initiated by carrier injection, for which the carriers originate from an inversion channel formed between the epitaxial layers and the p-silicon substrate. TCAD simulations have confirmed the proposed explanations, and suggest that appropriate modification of the electronic structure at the AlN/silicon interface could significantly improve the vertical breakdown voltage.

Threshold Voltage Engineering in GaN-Based HFETs: A Systematic Study With the Threshold Voltage Reaching More Than 2 V

One of the key challenges for the adoption of gallium nitride (GaN)-based heterostructure field effect transistors (HFETs) in power-switching applications is obtaining enhancement mode behavior. A large variety of methods have been applied to shift the threshold voltage Vth of HFETs. However, most of the time, approaches were discussed individually, neglecting the effects of combinations. Hence, in this paper, a comprehensive study of four different approaches to shift Vth well into the positive range is presented. We show the effects of different gate metallizations, of a backbarrier, of a gate oxide, and of a gate recess. Each approach is discussed individually, and special focus is on the insulator/semiconductor interface, which is apparently different with and without gate recess. The final device exhibits a Vth of +2.3 V, which is shown to be stable when applying OFF-state stress during dynamic characterization.

Fabrication of p-channel heterostructure field effect transistors with polarization-induced two-dimensional hole gases at metal-polar GaN/AlInGaN interfaces

Novel nitride-based heterostructures have been fabricated demonstrating two-dimensional hole gases as the basis for p-channel transistors. The carrier density in the 2DHG is adjusted between very high values of 2 × 1013 cm−2 and low values of 6 × 1011 cm−2 by the polarization difference, ΔP, between quaternary AlInGaN backbarriers and a GaN channel on top. Record mobilities for holes in GaN of 43 cm2 V−1 s−1 (median 30 cm2 V−1 s−1) are observed for a moderate 2DHG density of 1.3 × 1012 cm−2 (median 2.2 × 1012 cm−2).Heterostructures with different backbarrier compositions are processed to field effect transistors and show a systematic threshold voltage shift from positive to negative values according to the corresponding 2DHG density. It is shown for the first time that by appropriate polarization-engineering through changing the AlInGaN composition, both depletion and enhancement mode behaviour can be achieved for p-channel devices.Drain current densities |Id| above 40 mA mm−1 at a drain source voltage Vds of −10 V are achieved for heterostructures with high polarization differences, ΔP, between AlInGaN backbarrier and GaN channel. Reducing ΔP leads to decreasing on-state drain currents |Id| with a simultaneous reduction in off-state current. This results in very large on/off ratios of up to 108 for enhancement mode devices, demonstrating record performances and great potential for future applications.

GaN-on-Si Enhancement Mode Metal Insulator Semiconductor Heterostructure Field Effect Transistor with On-Current of 1.35 A/mm

GaN-on-Si transistors are regarded as a candidate for future power-switching applications. Beside the necessity to achieve enhancement mode behavior, on-resistance and maximum gate voltage are still limited for GaN-based transistors on Si substrate. Here, an enhancement mode metal insulator semiconductor heterostructure field effect transistor on Si substrate with record on-current of 1.35 A/mm and threshold voltage of +0.82 V is demonstrated. The corresponding gate current is still well below 1 mA/mm at 6.5 V gate voltage. By comparison of measured and simulated CV curves, the density of interface states introduced by the insulator is shown to be quasi-independent on etch damage and/or barrier material.

Charge balancing in GaN-based 2-D electron gas devices employing an additional 2-D hole gas and its influence on dynamic behaviour of GaN-based heterostructure field effect transistors

GaN-based heterostructure FETs (HFETs) featuring a 2-D electron gas (2DEG) can offer very attractive device performance for power-switching applications. This performance can be assessed by evaluation of the dynamic on-resistance Ron,dyn vs. the breakdown voltage Vbd. In literature, it has been shown that with a high Vbd, Ron,dyn is deteriorated. The impairment of Ron,dyn is mainly driven by electron injection into surface, barrier, and buffer traps. Electron injection itself depends on the electric field which typically peaks at the gate edge towards the drain. A concept suitable to circumvent this issue is the charge-balancing concept which employs a 2-D hole gas (2DHG) on top of the 2DEG allowing for the electric field peak to be suppressed. Furthermore, the 2DEG concentration in the active channel cannot decrease by a change of the surface potential. Hence, beside an improvement in breakdown voltage, also an improvement in dynamic behaviour can be expected. Whereas the first aspect has already been de...

Investigation of plasma-oxidized aluminium as a gate dielectric for AlGaN/GaN MISHFETs

Nitride-based metal insulator semiconductor heterostructure field effect transistors (MISHFETs) have shown great potential, recently. An elegant technological approach is presented to fabricate MISHFETs with the gate dielectric formed only in the gate region. Aluminium is deposited in the gate region, oxidized by an inductively coupled oxygen plasma, subsequently covered by the evaporated gate contact metal and finally lifted off, all using a single patterning step. The electrical properties of the dielectric fabricated in this manner can be enhanced by annealing. Leakage currents comparable to those of other dielectric deposition methods are achieved. A subthreshold swing below 80 mV dec−1 indicates a high-quality interface.

First Small-Signal Data of GaN-Based p-Channel Heterostructure Field Effect Transistors

p-Channel heterostructure field effect transistors (HFETs) have recently attracted increasing interest. They open up the possibility of fabricating nitride-based low-power complementary logic for operation in environments not accessible to other semiconductors. To date, several publications have dealt with DC data of p-channel GaN-based HFETs. However, small-signal data, which is important in terms of accessible operation frequencies, is missing. In this brief note, we report for the first time the small-signal characteristics and cut-off frequencies of a p-channel device.