Hideaki Matsuhashi

Optimum Electrode Materials for Ta2O5 Capacitors for High- and Low-Temperature Processes

In this paper, we describe the effects of electrode materials on the leakage current of Ta2O5 films, and show optimum electrode materials for high- and low-temperature processes. The leakage current depends on the electrode material and varies with the annealing temperature. The leakage current is mainly determined by the work function of the electrode before and after low-temperature annealing (400° C). On the other hand, after high-temperature annealing (800° C), the leakage current is also affected by the reaction between Ta2O5 and the electrode. From the viewpoint of the leakage current, TiN and Mo (or MoN) are optimum materials for low- and high-temperature processes, respectively.

Formation of c-Axis-Oriented Bi4Ti3O12 Films with Extremely Flat Surface by Spin-Coating

The formation of c-axis-oriented Bi 4 Ti 3 O 12 (BIT) films by spin-coating has been investigated. The crystallinity of BIT films depends on the Bi to Ti molar ratio of the starting BIT solution and on the annealing temperature. The BIT film spin-coated with a 10% Bi-rich solution and annealed at 850°C shows a highly c-axis-oriented crystallinity. In addition, it is found that a BIT layer spin-coated on this c-axis-oriented film becomes highly c-axis-oriented even if the starting solution is not Bi-rich, and that the obtained film has an extremely flat surface when the first BIT layer is thinly applied. The resulting films exhibit good properties for use in metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structural memory devices, such as a low leakage current density of 7 x 10 -7 A/cm 2 at 3V, a remanent polarization of 2.5 μC/cm 2 , a coercive field of 8kV/cm, and a dielectric constant of 120.

Arf Laser-Induced Chemical-Vapor Deposition of Tungsten for Gate Electrodes

The deposition of W films by ArF laser-induced chemical-vapor deposition (LCVD) was investigated as a function of incident laser power, WF 6 and H 2 partial pressures, and substrate temperature. The deposition of W films by LCVD is discussed dividing that into two parts, thermal CVD (TCVD) and photon assisted CVD (P h CVD). The rate of P h CVD has been defined as the difference between the rates with and without laser irradiation. The reaction orders for P h CVD are 1, 0 with respect to WF 6 and H 2 partial pressures, respectively, and the rate linearly increases with increase in laser repetition rate. The activation energy in P h CVD is 0.17 eV. These facts indicate that, in LCVD, P h CVD takes place independently of TCVD and that the deposition rate in P h CVD is determined by the formation of F radicals in the dissociation of WF 6 molecules by laser irradiation. MOS capacitors with LCVD-W gates were fabricated and their characteristics were compared with those with sputtered-W gates. It was shown that the level of contamination due to mobile ions in the capacitor with the LCVD-W gate was extremely low.

Effect of W film stress on W-gate MOS characteristics

The fixed oxide charge density (Nf) of W-gate MOS capacitors has been investigated as a function of both annealing temperature and stress of the W film. It is found that Nf greatly increases upon 1000°C annealing when the total stress, which is defined as the product of the W film stress before 1000°C annealing and thickness of the W film, is more than 1.4×105 dyne/cm (compressive). The interface state density (Dit) also increases with increase in Nf. For the samples whose Nf is large, etch pits are revealed on the Si surface by Secco etching. There is a linear correlation between the etch pit density and the Nf value. It is supposed that the increases of Nf and Dit are due to Si defects formed at the SiO2/Si interface by the large stress of the W film.

Small- and large-signal RF characterization of fully-depleted accumulation-mode varactors for low-voltage LC-VCO SOI design

This paper discusses on small- and large-signal RF characterization of fully-depleted accumulation-mode varactors for low-voltage LC-VCO SOI design. This work provides a complete analysis of the evolution of K/sub v/ between small- and large-signal regimes and its consequences to the VCO design. Furthermore, several SOI devices are investigated, showing the best performances of zero voltage accumulation-mode varactors.

Effect of Gate Materials on Generation of Interface State by Hot-Carrier Injection

The effect of gate materials on hot-carrier degradation, especially on the generation of the interface state, is investigated. The generation of the interface state in n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) by drain avalanche hot-carrier (DAHC) injection is independent of the gate material. On the other hand, the generation of the interface state in p-channel MOSFETs (PMOSFETs) by DAHC injection is greatly dependent on the gate material but almost independent of the channel doping profile, in other words, a surface- or buried-channel device. The increase in interface state density (ΔDit) in tungsten (W)-gate PMOSFETs is much larger than that of polycide-gate devices. In order to verify the effect of carrier species injected into SiO2, electrons were injected from the substrate into the gate electrode by two methods: Fowler-Nordheim injection and hot-electron injection from the forward biased p-n junction injector. The large ΔDit in W-gate devices is observed in both methods. It is confirmed that the large ΔDit in W-gate PMOSFETs stressed by DAHC injection is caused by the injection of electrons into SiO2. These phenomena are considered to occur due to the difference of hole injection from the gate into SiO2, excited at the gate by electron injection, between gate materials.

Noise modeling and performance in 0.15-μm fully depleted SOI MOSFET

This paper is intended to describe on one part theoretical results issued from a physical noise modeling and on the other part the noise performance of Fully Depleted (FD) SOI MOSFET of 0.15 μm gate length. In the theoretical part, the physical noise model is applied to two distinct applications; first to study the influence of the microscopic diffusion noise sources definition (located in the channel device) on the noise performance, second to check the concept of un-correlated noise sources, if one uses an input noise voltage and output drain noise current representation. In the experimental part, both bias and frequency dependences of the measured noise performances of the 0.15 μm gate length fully depleted (FD) SOI MOSFET (OKI technology) are presented, and a comparison with the results issued from the physical noise model is proposed.

X-ray Shielding of an Ionizer using Low-Energy X-rays below 9.5 keV for Ultra-Clean Assembly Line of Electronic Devices

An ionizer has been developed using a low-energy X-ray for producing ion pairs that are transported by clean air through a shielding plate to objects to be discharged. The shielding plate should shield the X-ray of below 9.5 keV, while it should pass sufficient amount of the ion pairs. In this study, characteristics of the structural condition of the shielding plate has been investigated, on both the shielding effect and the ability to pass the ion pairs. We confirmed the structural condition that the leakage dose rate of the low-energy X-rays could be decreased to less than 1 mSv/h while allowing the passage of enough ion pairs to eliminate the static electricity. [DOI: 10.1143/JJAP.44.4878]

A Novel Clean Ti Salicide Process Using Grooved Gate Structure

It is demonstrated that dry etching and Ar sputtering for Si surface cleaning cause phase transition failures of TiSi2 and degradation of the resistivity. We propose a Ti self-aligned-silicide (salicide) process using a grooved gate structure. In this technique, poly-Si is patterned by an oxide mask. The oxide layer protects the gate surface from contamination by dry etching for sidewall formation. Before Ti deposition, the poly-Si surface is not sputtered by Ar to clean the surface. As a result, TiSi2 agglomeration was suppressed drastically in comparison with the conventional gate structure.

Enhancement of deposition rate by adding Si2F6 in low‐pressure chemical vapor deposition of W using WF6 and H2

The effects of addition of Si2 F6 to low‐pressure chemical vapor deposition of W using WF6 and H2 was studied. Adding sufficient Si2 F6 gas enhances the deposition rate (RD ) of W film in the WF6 and H2 system by a factor of 2 over a wide range of deposition parameters, that is, the substrate temperature and the partial pressures of H2, WF6, and Si2 F6. W films deposited under the conditions where the enhancement of RD occurs have a resistivity as low as that of films deposited in the WF6 and H2 system, except for some W films exhibiting β‐W structure, and have no Si contamination. The origin of the enhancement of RD by adding Si2 F6 is discussed.