Tomomi Yamanobe

Dry Etching Technique for Subquarter‐Micron Copper Interconnects

A dry etching technique for subquarter-micron Cu interconnects has been developed. A self-aligned passivation film on sidewalls of Cu lines is formed during etching. The thickness of the sidewall film composed of SiON can be controlled precisely by the composition of the etching gas mixture. The addition of NH 3 to the etching gas mixture of SiCl 4 /Cl 2 /N 2 results in a sidewall film free of chlorine. Therefore the sidewall film acts to protect Cu from oxidation and corrosion, and sustains the multilayered structure without film peeling during the fabrication process

Thermal stability of copper interconnects fabricated by dry-etching process

Abstract The thermal stability of Cu interconnects fabricated by dry etching with simultaneous formation of a self-aligned passivation film has been investigated. The passivation film on the sidewall of the interconnects is composed of SiON free from impurities such as Cl. This film acts as a barrier layer to prevent Cu from corroding and oxidizing during any subsequent process, such as formation of a dielectric overcoating. Using this etching process, the Cu interconnect of a TiN/Cu/TiN multilayered structure is formed. The resistivity of the Cu interconnects is about 1.7–2.2 μΩ cm in the width range 0.2–10μm and remains unchanged on annealing up to 700 °C. Diffusion of Cu into the substrate is not observed up to 800 °C annealing. These results demonstrate that the sidewall film prevents diffusion of Cu. Therefore the Cu interconnect covered with TiN and the thick sidewall film is suitable for the ultralarge-scale integration process.

Thermal Stability of Interconnect of TiN/Cu/TiN Multilayered Structure

The etching process for a Cu interconnect with self-aligned deposition of a thick sidewall film has been developed. This sidewall film acts as a barrier layer to prevent Cu from corrosion and oxidation during the subsequent process, such as formation of a passivation film. Using this etching process, the Cu interconnect of a TiN/Cu/TiN multilayered structure in a submicron feature is formed. Resistivity for the Cu interconnects is about 2 µ Ω cm, and it does not change on annealing up to 700° C. Diffusion of impurities into Cu is not observed up to 800° C annealing. Therefore, the structure of the Cu interconnect, that is, Cu covered with TiN and the thick sidewall film, is suitable for the ULSI process.

Effects of Ion Etching and Annealing in O2 Atmosphere Following Ion Etching on Properties and Chemistry of Sr0.9Bi2.1Ta2O9+a Thin Films

The effects of ion etching and effects of annealing in an O2 atmosphere for 60 min at 800°C following ion etching (reannealing) on the properties of Sr0.9Bi2.1Ta2O9+a (SBT) thin films for ferroelectric memory were studied. The leakage current increased by six orders of magnitude following Ar-ion etching, and it caused a bulging out of the hysteresis loop. Electron probe micro analysis (EPMA) results showed no significant change following the ion etching, whereas X-ray photoelectron spectrometry (XPS) detected a large decrease in the Bi concentration and increase in the metallic Bi to oxidic Bi ratio. Following reannealing, the electrical properties and surface compositions were restored. Thus, the electrical properties were significantly affected by the presence of metallic Bi together with a large composition deviation in the surface region. It was concluded that ion etching of the SBT thin films causes a reduction of oxidic Bi to metallic Bi and a decrease in the total Bi concentration in the surface region resulting in a high leakage current density, whereas annealing in an O2 atmosphere is effective for restoring the initial low leakage current density.

High-Reliability Copper Interconnects through Dry Etching Process

A modified high-temperature dry etching technique, which enables anisotropic patterning with a high etching selectivity and self-aligned passivation of a sidewall of an interconnect simultaneously, has been developed for fabrication of sub-quarter-micron Cu interconnects. Resistivities of the resulting Cu interconnects are in the range of 1.7 to 2.2 µΩ cm for the linewidth of 0.2-3.0 µ m. As a result of electromigration (EM) tests, it has been observed that median time to failure (MTF) of the Cu interconnects depends on their linewidth. This behavior is considered to be caused by their grain structure, such as a bamboo-type structure for linewidths narrower than 0.3 µ m. In comparison with a MTF of a conventional Al-1%Si line, these Cu interconnects have at least 100 times longer lifetime. Activation energy for EM damage of the 0.7-µ m-wide line is 0.88 eV.

Metallic bismuth on strontium-bismuth tantalate thin films for ferroelectric memory application

Strontium-bismuth tantalate (SBT) has been actively investigated as an attractive candidate for non-volatile ferroelectric random access memories because of its high resistance to fatigue. However, the ferroelectric property of SBT is easily affected by fabrication process parameters. The relationship between the surface chemistry of SBT thin films and the fabrication process parameters, such as crystallization temperature, upper Pt electrode, annealing in oxygen after Pt electrode fabrication (= the second annealing), hydrogen sintering and ion etching, were examined mainly by XPS analysis. In all specimens, metallic Bi, which is one of the main causes for deterioration of their performances, was observed in addition to oxidic Bi, Sr and Ta. The deposition of an upper Pt electrode resulted exclusively in an increase in metallic Bi content. Sintering in a hydrogen atmosphere and ion etching increased the ratio of metallic Bi to total Bi. The second annealing was effective in suppressing the metallic Bi content.

Formation of c-Axis-Oriented Bi4Ti3O12 Films with Extremely Flat Surface by Spin-Coating

The formation of c-axis-oriented Bi 4 Ti 3 O 12 (BIT) films by spin-coating has been investigated. The crystallinity of BIT films depends on the Bi to Ti molar ratio of the starting BIT solution and on the annealing temperature. The BIT film spin-coated with a 10% Bi-rich solution and annealed at 850°C shows a highly c-axis-oriented crystallinity. In addition, it is found that a BIT layer spin-coated on this c-axis-oriented film becomes highly c-axis-oriented even if the starting solution is not Bi-rich, and that the obtained film has an extremely flat surface when the first BIT layer is thinly applied. The resulting films exhibit good properties for use in metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structural memory devices, such as a low leakage current density of 7 x 10 -7 A/cm 2 at 3V, a remanent polarization of 2.5 μC/cm 2 , a coercive field of 8kV/cm, and a dielectric constant of 120.

Copper Interconnects Fabricated by Dry Etching Process

Copper is the major candidate to replace Al alloys for subquarter-micron interconnect, because of its low resistivity and long EM lifetime.t) However, problems such as the difficulty of dry etching caused by low vapor pressure of etching products, and conosion and oxidation of Cu during processes between Cu patterning and subsequent SiO2 deposition hindered its use.l) Difficulty of Cu patterning was the most serious of these problems. In recent years, some microfabrication processes for Cu interconnects have been proposed, such as chemical mechanical polishing (CMplarr and some dry etching techniques.o-u) Consequently, Cu interconnects of sub-quarter-micron order are realized. In this paper, EM lifetimes of the Cu interconnecrs fabricated by high-temperature dry etching using the selfaligned passivation technique5) were investigated. Mechanisms for the dependence of EM lifetimes and its activation energies on linewidth was inferred from literature on A[ interconnects. Since both Cu and At have the same face-centered-cubic (fcc) crystal structure, the diffusion mechanism of Cu is thought to be almost the same as that of