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Featured researches published by Hidenori Matsuzaki.


ieee symposium on large data analysis and visualization | 2015

Advanced aggregate computation for large data visualization

Xinxiao Li; Akira Kuroda; Hidenori Matsuzaki; Nobuyasu Nakajima

Large data visualization and analysis faces challenges related to performance, operability, degree of discrimination, etc. In this paper, an advanced aggregate computation is proposed to solve these issues from three aspects. By virtue of visualization-based data separation and aggregation, a large dataset is mapped to a visualization-based small dataset for efficient visualization while keeping operability of data. A minimum size of visual primitives for aggregated data is defined to ensure visibility of important but tiny information. And a D3-based rendering implementation improves the performance of consecutive visualizations.


ieee symposium on large data analysis and visualization | 2015

Distributed aggregate computation between server and client for interactive visualization

Xinxiao Li; Akira Kuroda; Hidenori Matsuzaki; Nobuyasu Nakajima

A visualization system is frequently challenged by large volume of datasets to be processed. The situation becomes more serious when visual feedback is required to be responsive. In this paper, an adaptive approach is proposed to efficiently distribute aggregate computation load between server and client for interactive visualization. This proposal combines available computing power on both server and client sides. Additionally, adaptively shifts part of the aggregate computation load to and fro for achieving interactive rate of large data visualization. An experimental prototype confirmed that that proposed method improves interactive rate of large data visualization.


asia and south pacific design automation conference | 2009

Mapping method for dynamically reconfigurable architecture

Akira Kuroda; Mayuko Koezuka; Hidenori Matsuzaki; Takashi Yoshikawa; Shigehiro Asano

We present a mapping algorithm for our dynamically reconfigurable architecture suitable for stream applications such as H.264. Because our target architecture consists heterogeneously of four different configuration format units, its difficult to apply the conventional algorithms. We propose a heuristic mapping algorithm enabling the mapping of generic dataflow graph onto this complex hardware automatically. We mapped five main functions of H.264 decoder onto our architecture and compared the results with those of manual mapping performed by an experienced engineer. The results show optimization of three of the five functions is equal to that in the case of the manual mapping.


Archive | 2009

Semiconductor Storage Device, Method of Controlling The Same, Controller and Information Processing Apparatus

Hirokuni Yano; Shinichi Kanno; Toshikatsu Hida; Hidenori Matsuzaki; Kazuya Kitsunai; Shigehiro Asano


Archive | 2009

Memory system and method for controlling a nonvolatile semiconductor memory

Junji Yano; Kosuke Hatsuda; Hidenori Matsuzaki; Wataru Okamoto


Archive | 2012

Semiconductor storage device with volatile and nonvolatile memories

Hirokuni Yano; Shinichi Kanno; Toshikatsu Hida; Hidenori Matsuzaki; Kazuya Kitsunai; Shigehiro Asano


Archive | 2007

PERFORMANCE MONITOR DEVICE, DATA COLLECTING METHOD AND PROGRAM FOR THE SAME

Hidenori Matsuzaki; Seiji Maeda


Archive | 2008

Memory system with write coalescing

Junji Yano; Hidenori Matsuzaki; Kosuke Hatsuda


Archive | 2009

Semiconductor device having a volatile semiconductor memory and a nonvolatile semiconductor memory which performs read/write using different size data units

Hirokuni Yano; Shinichi Kanno; Toshikatsu Hida; Hidenori Matsuzaki; Kazuya Kitsunai; Shigehiro Asano


Archive | 2009

Semiconductor storage device with nonvolatile and volatile memories, method of controlling the same, controller and information processing apparatus

Hirokuni Yano; Shinichi Kanno; Toshikatsu Hida; Hidenori Matsuzaki; Kazuya Kitsunai; Shigehiro Asano

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