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Dive into the research topics where Hidenori Mitani is active.

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Featured researches published by Hidenori Mitani.


international solid-state circuits conference | 2016

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C

Hidenori Mitani; Ken Matsubara; Hiroshi Yoshida; Takashi Hashimoto; Hideaki Yamakoshi; Shinichiro Abe; Takashi Kono; Yasuhiko Taito; Takashi Ito; Takashi Krafuji; Kenji Noguchi; Hideto Hidaka; Tadaaki Yamauchi

The computerization of automotive control has expanded the application range of micro controller units (MCUs). A high-end engine-control unit (ECU) requires high-performance Flash MCUs, which integrate high-speed CMOS logic and large high-performance embedded Flash memories (eFlash) [1,2]. There are also broad markets for motor control MCUs: used to control actuators in parts such as seats, windows, and mirrors. In order to integrate analog circuits to control the high voltage (HV) drivers in these parts, those MCUs have been manufactured in Flashless process, and external EEPROM chips are being used. EEPROM chips work as “learning memories” which store the calibration data to optimize analog circuit performance in the field. Replacement of external EEPROM chips by eFlash, resulting in less additional process cost and higher rewrite endurance, is a requirement for more elaborate learning at a higher data sampling rate. In addition to automotive grade reliability under extremely harsh temperature conditions, low power consumption is also a strong requirement as the number of MCUs used in motor control systems is increasing.


Archive | 2018

SONOS 1Tr eFlash Memory

Hidenori Mitani; Ken Matsubara

In this chapter, a brief history of SONOS flash technology is introduced followed by the details of one-transistor SONOS (1Tr-SONOS) technology. Memory-cell structure, basic cell-operation principles and fabrication process are described. Then basic array architecture and read/program/erase operations are explained with corresponding peripheral circuits. A disturb mode in program and erase operations is also discussed. Finally, advanced circuit techniques to expand application range, especially for automotive use with high reliability and low energy consumption are described.


Archive | 2004

Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time

Hidenori Mitani; Fumihiko Nitta; Tadaaki Yamauchi; Taku Ogura


Archive | 2004

Multi-level nonvolatile semiconductor memory device utilizing a nonvolatile semiconductor memory device for storing binary data

Hidenori Mitani; Tadaaki Yamauchi; Taku Ogura


Archive | 2007

Nonvolatile semiconductor memory device for writing multivalued data

Tomoyuki Fujisawa; Hikaru Shibahara; Hidenori Mitani; Akihiko Kanda


Archive | 2004

Nonvolatile semiconductor memory device including high efficiency and low cost redundant structure

Takeshi Hamamoto; Hidenori Mitani; Taku Ogura


Archive | 2008

Semiconductor memory device having memory block configuration

Taku Ogura; Tadaaki Yamauchi; Hidenori Mitani; Takashi Kubo; Kengo Aritomi


Archive | 2007

Method of erasing data in non-volatile semiconductor memory device while suppressing variation

Takashi Ito; Hidenori Mitani


Archive | 2007

Nonvolatile semiconductor memory device, and control signal generation circuit, and semiconductor device using this circuit

Takashi Ito; Hidenori Mitani; 秀徳 三谷; 孝 伊藤


Archive | 2008

Semiconductor memory device capable of achieving narrower distribution width of threshold voltages of memory cells and method of data write in the same

Tomoya Ogawa; Takashi Ito; Hidenori Mitani; Takashi Kono

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