Hidenori Takeuchi

A millimeter-wave intra-connect solution

A novel millimeter-wave Intra-Connect solution for short range, high speed, internal I/O connections in low-power logic 40 nm CMOS process is demonstrated. The system consists of a transmitter and a receiver that uses binary amplitude shift keying (ASK) modulation for a compact and power efficient design. The receiver realizes coherent demodulation using injection locking without a PLL or an external reference clock utilizing a path to inject the received signal into the VCO. The demonstrator achieves 11 Gb/s ASK data transmission over 14 mm using bond-wire antennas with a bit error rate (BER) of less than 10-11. The active footprint of the transmitter is 0.06 mm2 and the power consumption is 29 mW with an energy usage of 6.4 pj/bit per channel. The receiver occupies the active footprint of 0.07 mm2 and consumes 41 mW. The work shows the feasibility of the millimeter-wave Intra-Connect for high speed internal I/O connections.

A 109.5mW 1.2V 600M texels/s 3-D graphics engine

A 3D graphics engine consists of a programmable floating-point geometry engine and a rasterization engine to adapt to various memory-based set associative cache mechanism. The IC achieves 4.7M vertex/s and 600M texel /s systems, the rasterization engine has a coordinate I and dissipates 109.5mW. A 0.18 /spl mu/m 5M CMOS process is used to implement the 25.4mm/sup 2/ IC operating at 1.2V.

A single-chip RF front-end for the digital sound broadcasting

A complete single-chip RF front-end for the digital sound broadcasting has been developed. All RF circuits including LNAs, mixers, a PLL, a VCO, and an IF filter have been successfully integrated on a single-chip by employing the low-IF architecture.

26.5 A 0.7V 1.5-to-2.3mW GNSS receiver with 2.5-to-3.8dB NF in 28nm FD-SOI

We are approaching the age of IoE, in which wearable devices such as smart watches will be widespread. Sensing processors play a key role and the Global Navigation Satellite System (GNSS) is considered fundamental. Power consumption is one of the most important characteristics for such sensing processors. However, current GNSS receivers consume around 10mW [1,2] and are difficult to be embedded. GNSS receivers require high supply voltage for low-noise RF, which contributes to large power consumption. We developed 0.7V RF circuits that enable effective use of FD-SOI. Among the RF circuits, an LNA and an LPF are the key to 0.7V operation. We implemented an LNA with DC feedback using an OPAMP and an LPF that is composed of OTAs that have positive feedback as well as a mechanism for adjusting the output common-mode voltage.