Hideo Honma

Via-filling using electroplating for build-up PCBs

Abstract The requirement of miniaturization of printed circuit boards has been increased with downsizing of electronic devices. However, the conventional multi-layered printed circuit boards are now facing the limitation for high mounting densities. Therefore, a newly developed build-up process has emerged as a new multi-layered printed circuit board manufacturing process. This new technology has adopted the micro-vias for connection between each conductive layer. If the micro-vias can be filled with copper metal, signal propagation is enhanced by via-on-via connection. Therefore, effective circuitry can be achieved. However, filling the conductive layer with the micro-vias is becoming difficult using the conventional plating process or the electrical conductive paste. Filling of the micro-vias by electroplating is studied. It was confirmed that copper sulfate concentration in copper sulfate plating bath is one of the key factors to fill the micro-vias, and the vias can be filled using a high copper concentration bath.

Electroless Copper Deposition Process Using Glyoxylic Acid as a Reducing Agent

Glyoxylic acid as an alternative reducing agent for electroless copper plating was investigated. Plating rates and bath stability were superior to that of the formaldehyde bath under standard conditions. The morphologies of deposited copper film were not greatly affected by ethylenediaminetetraacetic acid concentration, and mechanical properties (for instance, the ductility) of deposited films were obtained. The rate of the Cannizzaro reaction with glyoxylate ions was faster than with formaldehyde, but could be reduced by 10 to 40% using KOH instead of NaOH. It was confirmed that the uniformity of hole wall coverage was superior to that of the formaldehyde bath

Advanced copper electroplating for application of electronics

Abstract Copper electroplating has been of much interest for the interconnection of printed circuit boards (PCBs) and ultra large scale integration (ULSI), wiring so-called damascene process. Therefore, copper filling by electroplating has been actively studied. In this research, via-filling for build-up process of PCBs and the ULSI wiring formation without void and overplate has been examined using an acid cupric sulfate bath containing chloride (Cl), polyethylene glycol, bis (3-sulfopropyl) disulfidedisodium, Janus Green B and thiourea. The void-free filling in the range of 0.18–180 μm width via holes and trenches can be achieved by the selection of these additives. It is confirmed that the elements of these additives are detected only on the upper layer part of copper films by glow discharge optical emission spectroscopy.

Plating technology for electronics packaging

Abstract With the miniaturization of electronic devices, the connection reliability between integrated circuits (IC) and the external circuits has become important. Electroplating and electroless plating have been applied for the metallization of electronic components. Recently, advanced plating technology is strongly in demanded for the manufacturing of electronic components, because many devices are becoming finer and more complicated. In this paper, we focus mainly on the plating technologies for the preparation of micro-electronic components. The bump formation by electro and electroless plating, via-filling by copper electroplating, improvement of adhesion strength between the insulation layer and the deposited metal, and the preparation of anisotropic conductive particles have been investigated.

Electroplating Ni micro-cantilevers for low contact-force IC probing ☆

We present a new MEMS probe card made of electroplated nickel micro-cantilevers, which has compliant structures, and uses a kind of electric breakdown, or fritting, to make electric contacts to electrodes on ICs. The characteristics of fritting contact between nickel probe and Al electrodes were investigated, and nickel was found to have lower contact resistance than other materials. A micro-machining process for the probe cards, including deposition of layers having different internal stress to make a protruding cantilever shape, was developed. It was found that the fritting process using the micro-cantilevers could make the low-resistance contacts with the force of less than a few micronewtons.

Low contact-force and compliant MEMS probe card utilizing fritting contact

We present a new MEMS probe card made of electroplated Ni micro-cantilevers, which has compliant structures, and uses a kind of electric breakdown, or fritting, to make electric contacts to electrodes on ICs. The characteristics of fritting contact between Ni probe and Al electrodes were investigated, and Ni was found to have lower contact resistance than other materials. A micro-machining process for the probe cards, including deposition of layers having different internal stress to make a protruding cantilever shape, was developed.

Fabrication of Nickel Microbump on Aluminum using Electroless Nickel Plating

Fabrication of nickel microbumps on an aluminum electrode using a nickel displacement and a direct nickel plating process was investigated. Electroless nickel plating reaction with hypophosphite as a reducing agent was not initiated on the aluminum substrate, because aluminum does not have catalytic action on the oxidation of hypophosphite. Accordingly, nickel was initially deposited on the aluminum using nickel displacement plating for the initiation of the electroless plating. Nickel bumps on the aluminum electrode were fabricated by treatment of the nickel displacement plating followed by electroless nickel plating. Nickel microbumps also can be formed on the aluminum electrode without the displacement plating process. Activation of the aluminum surface is an indispensable process to initiate electroless nickel plating. Uniform bumps 20 μm wide and 15 μm high with good configuration were obtained by direct nickel plating after being activated with dimethyl amine borane.

Microbump Formation by Noncyanide Gold Electroplating

Formation of gold microbumps by electrodeposition using gold sulfite as a metal source was investigated. Gold bumps 20-80 μm wide and 20 μm high were fabricated by either direct or pulse current plating. It was found that selection of additives in the plating bath is important for the formation of gold bumps having smooth surface without nodules. Soft and uniform gold bumps can be obtained by adding 1-10 ppm of cerium ions in the plating bath. Removal of dissolved air in the plating solution is effective to avoid the skip plating and bubble pinholes on the bumps. Furthermore, higher speed bump formation can be achieved by optimizing the pulse conditions, and the plating rate can be doubled compared with direct current plating.

Electroless Nickel Plating for Nanofabrication in Optics

The electroless plating method has played an important role as an indispensable metallization technology for miniaturization of electronic components. This investigation discusses selective metallization on the fine area (nanometer size) by electroless plating. The experimental purpose is to fabricate a probe which is used for scanning near‐field optical microscopy. The probe (cone angle 20°, probe size 4 μm) is comprised of an optical fiber covered with a metal film except for an aperture at the apex of the fiber. Nickel‐plated probes with an aperture of 100 nm were fabricated by optimization of the plating conditions (dissolved oxygen concentration, bath temperature, and bath pH) and the addition of a catalytic poison into the plating bath.

The electroless copper plating of small via holes

SummaryThe Build-up method is becoming an important process with the increase in electric wiring density and miniaturization of the hole diameter. Preparation and circulation of plating solutions become difficult in the via hole with reduction of the hole diameter, so that uniformity of deposits decreases and this leads to lowering the electric reliability between each layer. Therefore the uniformity of electroless copper plating was investigated using small via holes (20–100 μn φ, 30–230 μm depth) prepared on the wiring board. Uniform deposits were obtained by changing the parameters related to the deposition characteristics. The possibility of via filling by the electroless copper was also investigated.