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Dive into the research topics where Hidetaka Shigi is active.

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Featured researches published by Hidetaka Shigi.


japan international electronic manufacturing technology symposium | 1995

High wiring density Cu-polyimide thin film multilayer circuit which is realized by the vertical plated small via

Naoki Matsushima; Tetsuya Yamazaki; Hideo Sotokawa; Hiroyuki Kojima; Hidetaka Shigi

A fabrication process for Cu-polyimide thin film multilayer circuit has been developed for advanced multichip module. The multilayer circuit realizes a high wiring density circuit by applying Cu studs which are deposited by electroplating using the guide patterns made of thick positive photoresist, photosensitive polyimide for insulating layers which has low reactivity against Cu, and a polishing process for planarizing dielectric layers. This paper reports on the structure of the circuit and on the thin film process technology.


japan international electronic manufacturing technology symposium | 1993

Stress Analysis On Hybrid Multilayer Substrate Composed Of Polyimide And Ceramics

H. Arima; E. Sotokawa; R. Sate; F. Shoji; Hidetaka Shigi; T. Hatsuta

The mechanical characteristics of thin film multilayer circuits ire investigated by stress analysis based on experiments. The warping and separation of the film from the substrate is observed experimentally by repeatedly depositing polyimide films on the substrate, revealing the relationship between film thickness and stress in the film. To simulate the stress, we estimated the mechanical properties from the warpings of the films on the substrates. substrate is a quadratic function of the film thickness deposited on it, just as for a bi-metal. The maximum thickness of thin film that will not peel off from the substrate can be estimated from this relationship. The warping of the


Archive | 1998

Connector and probing system

Susumu Kasukabe; Terutaka Mori; Akihiko Ariga; Hidetaka Shigi; Takayoshi Watanabe; Ryuji Kono


Archive | 1988

Multi-chip module structure

Takaji Takenaka; Tositada Netsu; Hidetaka Shigi; Masakazu Yamamoto


Archive | 2003

Semiconductor device and manufacturing method thereof including a probe test step and a burn-in test step

Ryuji Kohno; Tetsuo Kumazawa; Makoto Kitano; Akihiko Ariga; Yuji Wada; Naoto Ban; Shuji Shibuya; Yasuhiro Motoyama; Kunio Matsumoto; Susumu Kasukabe; Terutaka Mori; Hidetaka Shigi; Takayoshi Watanabe


Archive | 1995

Metalization structure and manufacturing method thereof

Hideo Sotokawa; Masashi Nishiki; Eiji Matsuzaki; Hidetaka Shigi; Toshio Terouchi; Mamoru Ogihara; Haruhiko Matsuyama; Minoru Tanaka


Archive | 2000

Multi-layer wiring substrate and manufacturing method thereof

Hidetaka Shigi; Naoya Kitamura; Masashi Nishiki; Tetsuya Yamazaki; Takehiko Hasebe; Masayuki Kyooi; Yukio Maeda


Archive | 1990

Method and apparatus of fabricating electric circuit pattern on thick and thin film hybrid multilayer wiring substrate

Norio Saitou; Hideo Todokoro; Katsuhiro Kuroda; Satoru Fukuhara; Genya Matsuoka; Hideo Arima; Hitoshi Yokono; Takashi Inoue; Hidetaka Shigi


Archive | 1997

Manufacture of semiconductor element and method for probing to semiconductor element

Akihiko Ariga; Susumu Kasukabe; Ryuji Kono; Terutaka Mori; Hidetaka Shigi; Takayoshi Watabe; 英孝 志儀; 進 春日部; 昭彦 有賀; 照享 森; 竜治 河野; 隆好 渡部


Archive | 2004

Connection device and test system

Susumu Kasukabe; Terutaka Mori; Akihiko Ariga; Hidetaka Shigi; Takayoshi Watanabe; Ryuji Kono

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