Hirokazu Kikuchi
Tohoku University
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Hirokazu Kikuchi.
IEEE Transactions on Electron Devices | 2006
Mitsumasa Koyanagi; Tomonori Nakamura; Y. Yamada; Hirokazu Kikuchi; Takafumi Fukushima; Tetsu Tanaka; Hiroyuki Kurino
A three-dimensional (3-D) integration technology has been developed for the fabrication of a new 3-D shared-memory test chip. This 3-D technology is based on the wafer bonding and thinning method. Five key technologies for 3-D integration were developed, namely, the formation of vertical buried interconnections, metal microbump formations, stacked wafer thinning, wafer alignment, and wafer bonding. Deep trenches having a diameter of 2 mum and a depth of approximately 50 mum were formed in the silicon substrate using inductively coupled plasma etching to form vertical buried interconnections. These trenches were oxidized and filled with n+ polycrystalline silicon or tungsten. The 3-D devices and 3-D shared-memory test chips with three-stacked layers were fabricated by bonding the wafers with vertical buried interconnections after thinning. No characteristic degradation was observed in the fabricated 3-D devices. It was confirmed that fundamental memory operation and broadcast operation between the three memory layers could be successfully performed in the fabricated 3-D shared-memory test chip
international electron devices meeting | 2005
Takafumi Fukushima; Yusuke Yamada; Hirokazu Kikuchi; Mitsumasa Koyanagi
To achieve ultimate super chip integration, we have developed a three-dimensional integration technology called super-smart-stack technology using a self-assembly technique. The chip alignment accuracy of within 1mum is obtained by the self-assembly technique. We demonstrated for the first time that 3D SRAM test chip with ten memory layers was successfully fabricated using the super-smart-stack (SSS) technology
international electron devices meeting | 2007
Takafumi Fukushima; Hirokazu Kikuchi; Yusuke Yamada; T. Konno; Jun Liang; Keiichi Sasaki; Kiyoshi Inamura; Tetsu Tanaka; Mitsumasa Koyanagi
We have proposed a new three-dimensional (3D) integration technology based on reconfigured wafer-on-wafer bonding technique to solve several problems in 3D integration technology using the conventional wafer-on-wafer bonding technique. 3D LSIs are fabricated by bonding the reconfigured wafers onto the supporting Si wafer. The reconfigured wafer consists of many known good dies (KGDs) which are arrayed and glued on a holding Si wafer with Si steps by chip self-assembly technique. Therefore, the yield of the reconfigured wafer can be 100%. As a result, we can obtain a high production yield even after bonding many wafers. In addition, it is not necessary in the reconfigured wafer that the chip size has to be identical within the wafer. Therefore, we can stack various kinds of chips with different chip sizes, different materials and different devices in our new 3D integration technology based on the configured-wafer-on-wafer bonding technique (Reconfig. W-on-W 3D technology). We have developed key technologies to form W through-Si-Via (TSV) in the reconfigured wafer to fabricated 3D LSI test chips. We obtained excellent electrical characteristics of W-TSV using the daisy chain in 3D LSI test chip.
Japanese Journal of Applied Physics | 2008
Hirokazu Kikuchi; Yusuke Yamada; Atif Mossad Ali; Jun Liang; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi
Tungsten through-silicon via (W-TSV) technology is investigated for the fabrication of three-dimensional (3D) LSI chips having low-resistive TSVs with a width less than 3 µm. In our 3D integration technology, completed two-dimensional (2D) LSI chips including metal–oxide–semiconductor field-effect transistors (MOSFETs) and metal wirings are vertically stacked through a number of short vertical interconnections called TSV with lengths ranging from several microns to several tens of microns. The W-TSV technology is mainly divided into three low-temperature processes: deep-trench etching, dielectric layer formation, and filling with a conductive material. We successfully formed deep Si trenches through a 6-µm-thick SiO2 dielectric layer by the modified Bosch process. The depth of the resulting Si trenches with a dielectric layer is approximately 40 µm. A SiO2 layer was formed at the bottom and on the sidewall of the Si trenches by sub-atmospheric chemical vapor deposition (SACVD) method using tetraethylorthosilicate (TEOS) and O3. In addition, we succeeded in uniformly depositing a conformal W metal layer by time-modulated W-CVD method at 300 °C.
Japanese Journal of Applied Physics | 2006
Takafumi Fukushima; Yusuke Yamada; Hirokazu Kikuchi; Mitsumasa Koyanagi
A new three-dimensional (3D) integration technology using the chip-to-wafer bonding technique provides the ultimate super-chip integration in which various kinds of chip of different sizes can be vertically stacked and electrically connected through a number of vertical interconnections. We have investigated several key technologies of vertical interconnection formation, chip alignment, chip-to-wafer bonding, adhesive injection, and chip thinning to vertically stack known good dies (KGDs) into 3D LSI chips. By using these key technologies, successful fabrication of 3D LSI test chips with vertical interconnections consisting of In–Au microbumps and buried interconnections filled with polycrystalline silicon (poly-Si) was demonstrated. The test chips was composed of three kinds of very thin chip of 5, 6, and 7 mm2 and ranging in thickness from 30 to 90 µm. Each chip is tightly bonded using a low-viscosity epoxy adhesive as a dielectric material.
Journal of Neurology | 2011
Shigenori Kanno; Nobuhito Abe; Makoto Saito; Masahito Takagi; Yoshiyuki Nishio; Akiko Hayashi; Makoto Uchiyama; Risa Hanaki; Hirokazu Kikuchi; Kotaro Hiraoka; Hiroshi Yamasaki; Osamu Iizuka; Atsushi Takeda; Yasuto Itoyama; Shoki Takahashi; Etsuro Mori
The aim of this study was to characterise the white matter damage involved in idiopathic normal pressure hydrocephalus (INPH) using diffusion tensor imaging (DTI) and the relationship between this damage and clinical presentation. Twenty patients with INPH, 20 patients with Alzheimer’s disease and 20 patients with idiopathic Parkinson’s disease (as disease control groups) were enrolled in this study. Mean diffusivity (MD) and fractional anisotropy (FA) were determined using DTI, and these measures were analysed to compare the INPH group with the control groups and with certain clinical correlates. On average, the supratentorial white matter presented higher MD and lower FA in the INPH group than in the control groups. In the INPH group, the mean hemispheric FA correlated with some of the clinical measures, whereas the mean hemispheric MD did not. On a voxel-based statistical map, white matter involvement with high MD was localised to the periventricular regions, and white matter involvement with low FA was localised to the corpus callosum and the subcortical regions. The total scores on the Frontal Assessment Battery were correlated with the FA in the frontal and parietal subcortical white matter, and an index of gait disturbance was correlated with the FA in the anterior limb of the left internal capsule and under the left supplementary motor area. DTI revealed the presence of white matter involvement in INPH. Whereas white matter regions with high MD were not related to symptom manifestation, those with low FA were related to motor and cognitive dysfunction in INPH.
Journal of Cognitive Neuroscience | 2010
Hirokazu Kikuchi; Toshikatsu Fujii; Nobuhito Abe; Maki Suzuki; Masahito Takagi; Shunji Mugikura; Shoki Takahashi; Etsuro Mori
Dissociative amnesia usually follows a stressful event and cannot be attributable to explicit brain damage. It is thought to reflect a reversible deficit in memory retrieval probably due to memory repression. However, the neural mechanisms underlying this condition are not clear. We used fMRI to investigate neural activity associated with memory retrieval in two patients with dissociative amnesia. For each patient, three categories of face photographs and three categories of peoples names corresponding to the photographs were prepared: those of “recognizable” high school friends who were acquainted with and recognizable to the patients, those of “unrecognizable” colleagues who were actually acquainted with but unrecognizable to the patients due to their memory impairments, and “control” distracters who were unacquainted with the patients. During fMRI, the patients were visually presented with these stimuli and asked to indicate whether they were personally acquainted with them. In the comparison of the unrecognizable condition with the recognizable condition, we found increased activity in the pFC and decreased activity in the hippocampus in both patients. After treatment for retrograde amnesia, the altered pattern of brain activation disappeared in one patient whose retrograde memories were recovered, whereas it remained unchanged in the other patient whose retrograde memories were not recovered. Our findings provide direct evidence that memory repression in dissociative amnesia is associated with an altered pattern of neural activity, and they suggest the possibility that the pFC has an important role in inhibiting the activity of the hippocampus in memory repression.
Dementia and geriatric cognitive disorders extra | 2011
Makoto Saito; Yoshiyuki Nishio; Shigenori Kanno; Makoto Uchiyama; Akiko Hayashi; Masahito Takagi; Hirokazu Kikuchi; Hiroshi Yamasaki; Tatsuo Shimomura; Osamu Iizuka; Etsuro Mori
Background/Aims: Frontal lobe dysfunction is believed to be a primary cognitive symptom in idiopathic normal pressure hydrocephalus (iNPH); however, the neuropsychology of this disorder remains to be fully investigated. The objective of this study was to delineate a comprehensive profile of cognitive dysfunction in iNPH and evaluate the effects of cerebrospinal fluid (CSF) shunt surgery on cognitive dysfunction. Methods: A total of 32 iNPH patients underwent neuropsychological testing of memory, attention, language, executive function, and visuoperceptual and visuospatial abilities. Of these 32 patients, 26 were reevaluated approximately 1 year following CSF shunt surgery. The same battery of tests was performed on 32 patients with Alzheimer’s disease (AD) and 30 healthy elderly controls. Results: The iNPH patients displayed baseline deficits in attention, executive function, memory, and visuoperceptual and visuospatial functions. Impairments of attention, executive function, and visuoperceptual and visuospatial abilities in iNPH patients were more severe than in those with AD, whereas the degree of memory impairment was comparable to that in AD patients. A significant improvement in executive function was observed following shunt surgery. Conclusion: Patients with iNPH are impaired in various aspects of cognition involving both ‘frontal’ executive functions and ‘posterior cortical’ functions. Shunt treatment can ameliorate executive dysfunction.
electronic components and technology conference | 2007
Takafumi Fukushima; Y. Yamada; Hirokazu Kikuchi; Tetsu Tanaka; Mitsumasa Koyanagi
We have proposed chip-to-wafer stacking for three-dimensional (3D) integration. To realize the chip-to-wafer 3D integration, five key technologies of through-Si interconnection and microbump formation, chip-to-wafer alignment, underfilling, and chip thinning were investigated. Three-layer stacked chips with a layer thickness of several tens microns were fabricated by using the key technologies. Each chip was serially and mechanically aligned and bonded onto a support LSI wafer. In addition, we newly introduce a stacking technique using self-assembly as a key process for advanced chip-to-wafer 3D integration. High-precision alignment with an accuracy of within 1 mum was obtained and stacking throughput can be dramatically improved by the self-assembly.
American Journal of Neuroradiology | 2014
Shunji Mugikura; Hirokazu Kikuchi; Toshikatsu Fujii; Takaki Murata; Kei Takase; Etsuro Mori; S. Marinković; Shoki Takahashi
BACKGROUND AND PURPOSE: During surgery to treat an aneurysm in the anterior communicating artery, injury to the subcallosal artery, a perforator of the anterior communicating artery, may lead to infarction that produces basal forebrain amnesia after surgery. Our purpose was to examine whether 3D MR imaging can detect subcallosal artery infarction in patients with amnesia after surgery for an anterior communicating artery aneurysm. MATERIALS AND METHODS: We evaluated 3D–T2-weighted MR images obtained a median of 4 months after treatment of anterior communicating artery aneurysm for the presence of infarcted foci in 10 consecutive patients with postoperative amnesia. Because the subcallosal artery and its neighboring perforator, the recurrent artery of Heubner, were considered the most easily affected vessels during that surgery, we focused mainly on 8 regions of the subcallosal artery territory per hemisphere and 5 regions of the recurrent artery of Heubner territory per hemisphere. RESULTS: All 10 patients had infarcts in the territory of the subcallosal artery (median, 9 regions per patient), and most were bilateral (9 of 10 patients). Five patients had additional infarcted foci in the territory of the recurrent artery of Heubner (median, 1 region per patient), all unilateral. Among the regions perfused by the subcallosal artery, the column of the fornix was involved in all patients; the anterior commissure, in 9; and the paraterminal gyrus, in 8 patients. CONCLUSIONS: 3D MR imaging revealed subcallosal artery infarction, the distribution of which was mostly bilateral, presumably owing to the unpairedness of that artery, in patients with postoperative amnesia after anterior communicating artery aneurysm repair.