Hiroko Kaneko

Optimum design of n + -n - double-diffused drain MOSFET to reduce hot-carrier emission

Channel electric field reduction using an n+-n-double-diffused drain MOS transistor to suppress hot-carrier emission is investigated. The double-diffused structure consists of a deep low-concentration P region and a shallow high-concentration As region. The channel electric field strongly depends on such process and device parameters as the length of the n-diffusion region, drain junction depth, gate oxide thickness, gate length, applied voltage, and P implant energy. The optimum condition for a double-diffused structure is determined based on those parameter dependences of the channel electric field. The results of the optimum drain impurity profile to give the minimum channel electric field are obtained when the maximum lateral electric field is located at the boundary between the P region and the As region. The hot-carrier immunity of MOSFET and test circuits are improved by two orders of magnitude and one order of magnitude, respectively, under the optimum conditions.

Novel submicrometer MOS devices by self-aligned nitridation of silicide

A new MOS technology is developed for submicrometer MOS devices. In this new technology, TiSi2is formed on the source and drain diffused layers by self-aligned silicidation to reduce the sheet resistance, and TiN is formed in the contact holes by self-aligned nitridation of TiSi2. This TiN can be used as an effective barrier metal between Al and Si. TiSi2is prepared by a two-step annealing method to prevent a reaction between Ti and the field oxide. PSG cap annealing after TiSi2formation provides excellent p-n junction characteristics and relatively low silicide sheet resistance of 4 ω/□ even after annealing at 950°C for 30 min. TiN is formed by direct thermal nitridation of TiSi2in N2ambient at a temperature higher than 900°C after contact hole formation. The formation of TiN is confirmed by AES, ESCA, and X-ray diffraction analysis. The TiN formed by direct thermal nitridation is found to prevent Al diffusion into the Si substrate even for post-metallization annealing at 500°C for 1 h. The characteristics of devices fabricated by this new technology also are determined.

Novel submicron MOS devices by self-aligned nitridation of silicide (Sanicide)

A new MOS technology with the following advantages has been investigated: TiSi2is formed by being self-aligned to source and drain regions by silicidation; and TiN is formed by self-aligned to contact regions by direct nitridation. TiSi2was prepared by two-step annealing to only form silicide on the diffused layers. TiN was formed by direct nitridation of TiSi2in N2at a temperature higher than 900 °C. The TiN formed using this method was found to be an effective diffusion barrier between Al and Si for annealing at up to 500 °C for 1 hour. PSG-cap annealing provided excellent p-n junction characteristics with a silicide layer of 4 Ω/□ even after annealing at 950 °C for 30 min. Characteristics of devices fabricated by this new technology were demonstrated.