Hiroko Kubo

A 1.4µm front-side illuminated image sensor with novel light guiding structure consisting of stacked lightpipes

A frontside illuminated image (FSI) sensor with novel light guiding structures consisting of stacked lightpipes was developed using 45nm Cu processing on 300 mm wafers. We demonstrated a high quantum efficiency (QE) of 75% and maximum incident angle of 40°, which exceeds the performance of backside illuminated image (BSI) sensors [1,2,3]

Evaluation of charge build-up in wafer processing by using MOS capacitors with charge collecting electrodes

The charge build-up evaluation technique in semiconductor wafer processing such as ion implantation and plasma processing by using the MOS capacitor with charge collecting electrode (antenna) has been proposed. The estimation of charge build-up during ion implantation has been successfully demonstrated by using this technique. The charge detection sensitivity of a small area MOS capacitor can be improved by using the antenna structure. To estimate charge build-up quantitatively, gate oxide thickness, substrate type, capacitor area and antenna ratio should be carefully chosen. This technique is very useful to estimate charge build-up in conjunction with other charge build-up detection techniques such as EEPROM.