Masahiko Niwayama

Novel SiC power MOSFET with integrated unipolar internal inverse MOS-channel diode

A novel SiC power MOSFET with an integrated unipolar internal inverse diode has been developed for the first time. Our novel SiC MOSFET has two specific features. One is that the growth of the SiC crystal defects caused by the continuous bipolar forward current of the internal diode with pn junction is completely eliminated because the unipolar diode current passes through the MOS channel region. The other is that the very small-size power modules and/or power systems are successfully designed because the external inverse diode chips paired with the transistor chips are not necessary.

The drain current asymmetry of 130 nm MOSFETs due to extension implant shadowing originated by mechanical angle error in high current implanter

The drain current asymmetry of 130 nm n-MOSFETs due to extension and source/drain ion implantation shadowing at the edge of gate electrode has been investigated. The ion implantation angle error is occurred even the tilt and twist angles are mechanically set as 0 degree. This ion implantation angle error is remarkable at periphery area of 200 mm wafer. This angle error originated in wheel design and scanning method of a high current ion implanter. Those are structural limitation of a high current batch type ion implanter. The drain current asymmetry can be dramatically reduced by using 4-step (Tilt/Twist=0/0, 0/90, 0/180, 0/270 deg.) ion implantation for extension implant similar to pocket implant. Therefore, even the low energy, high current ion implantation such as extension and source/drain implant, 4-step ion implantation is indispensable to reduce the drain current asymmetry.

High density plasma flood system for wafer charge neutralisation

The Plasma Flood System, a low energy electron generator, has been widely used as an effective tool to neutralise wafer charging induced by ion implantation. Although it has been successful in achieving the full device yield under high current ion implantation, further advancement in device design imposed a need to minimise the wafer charging down to a few volts due to the use of thin gate oxide of less than 10 nm thickness. The High Density Plasma Flood System (HD PFS) was thus developed for the Applied Materials xR series Ion Implanters to maintain the maximum throughput with high current processes without compromising on device yield. HD PFS is a high efficiency charge neutraliser that supplies very low energy (<3 eV) electrons at high emission (>300 mA). The system has a unique configuration of magnetic circuit and arc discharge profile that enables the effective transport of electrons from the plasma source to the wafer while reducing the power consumption by one order of magnitude. This paper discusses the structure and the performance of the HD PFS in terms of electron transport efficiency and energy distribution. Typical operation window is also shown by using the yield of MOS capacitor devices at different gate oxide thickness (35, 5 and 10 nm). Sir months of filament life has been demonstrated.