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Dive into the research topics where Hiroto Yasuura is active.

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Featured researches published by Hiroto Yasuura.


digital systems design | 2003

Towards the Digitally Named World - challenges for new social infrastructures based on information technologies

Hiroto Yasuura

In the 21st century, social infrastructures, such as economic systems, transportation systems and governmental service systems, are redesigned and reconstructed based on information technologies. In this paper, basic information technologies of the new social infrastructures are proposed. The personal identifier (PID) system for bidirectional authentication and an RFID tag system will play important roles in the new social infrastructures. Using PID and RFID tag, we can bridge a gap between the real world and the virtual world on computers automatically. We call the society, in which all persons and goods have their own digital names and recognizable both in the real and virtual world, Digitally Named World. The systems require technologies of SoC, networking, security and software. Technical challenges and social requirements for the new technologies are presented.


pervasive computing and communications | 2005

Toward unlinkable ID management for multi-service environments

Yasunobu Nohara; Sozo Inoue; Hiroto Yasuura

As pervasive computing environments become popular, ID devices, such as smart cards and RFID tags, introduce multi-service environments, in which a user can receive multiple services by one ID device. However, there exists a problem that service providers can trace a users behavior by linking the users access history, if only one ID is assigned to the user. In this paper, we propose an unlinkable ID management scheme for multi-service environments. Our scheme provides unlinkability of users accesses against third-party service providers, by preparing different user IDs for each service, and by using cryptographic protocol to exchange the ID between a user and a service provider, while linkability is assured between the user and the involved provider.


international symposium on communications and information technologies | 2004

A design method for a low power equalization circuit by adaptive bitwidth control

Kosuke Tarumi; Masanori Muroyama; Seiichiro Yamaguchi; Hiroto Yasuura

We propose a new design method for a low power equalization circuit using adaptive bitwidth control. It can reduce the amount of necessary calculation to control the bitwidth of the equalization circuit. We show that our new method is effective for a low power equalization circuit by experimental simulation while keeping the required calculation accuracy.


ieee region 10 conference | 2004

A systematic approach for the reliability of RFID systems

Sozo Inoue; Daisuke Hagiwara; Hiroto Yasuura

In this paper, we address reliability issues in the digitally named world, which is the environment in which RFID (radio frequency identification) tags are attached to any objects in the real world. We propose a systematic approach to maintain the reliability and analyze the effect of our approach, and show that the possibility of identification failure are reduced to O(p/sup 2/) (0<p<1) from O(p) of the naive approach, where p is the possibility of failure on a single reader, on condition that the first and the final identifications of an object are ensured to be successful.


IEEE Transactions on Very Large Scale Integration Systems | 2003

Reduction of coupling effects by optimizing the 3-D configuration of the routing grid

Atsushi Sakai; Takashi Yamada; Yoshifumi Matsushita; Hiroto Yasuura

In this brief, we propose a new physical design technique for a subquarter micrometer system-on-a-chip (SoC). By optimizing the individual layers routing grid space, coupling effects such as crosstalk noise, crosstalk-induced delay variations, and coupling power consumption are almost eliminated with little runtime penalty. Experiments are performed on the design of an image processing circuit using a subquarter micron CMOS process with multilayer interconnects. Simply by employing our proposed technique, the maximum delay and the power consumption can be decreased simultaneously by up to 15% and 10%, respectively, without any other process improvements.


digital systems design | 2003

A power reduction scheme for data buses by dynamic detection of active bits

Masanori Muroyama; Akihiko Hyodo; Takanori Okuma; Hiroto Yasuura

To transfer a small number, we inherently need the small number of bits. But all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bits. In this paper, we propose a power reduction scheme for data buses using the active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate 20% - 35% on average and up to 54.2% switching activity reduction.


asia and south pacific design automation conference | 2005

A variation-aware low-power coding methodology for tightly coupled buses

Masanori Muroyama; Kosuke Tarumi; Koji Makiyama; Hiroto Yasuura

This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology and system-on-chip have resulted in a considerable portion of power consumption on buses, in which the major sources of the power consumption are the transition activities on the signal lines and the coupling capacitances of the lines. In addition, we enter an era of considering variation of the effective coupling capacitances. We address power reduction including these phenomena by using variable length coding. Experimental results show the effectiveness of our methodology.


international symposium on signals circuits and systems | 2004

Digitally named world: challenges for new social infrastructures

Hiroto Yasuura

introduced in social infrastructures, which are supporting our daily lives. Since the information technologies have progressed very rapidly, the basic structure of each social infrastructure, which was mostly designed in the 19th or the beginning of 20th centuries with few possibility of information technology, should be redesigned with an assumption of the existence of the advanced information technologies. Based on the high-performance SoCs (System-on-a-Chips) connected by wide-band networks, we can design next generation of social systems, which are directly related with quality of our society including individual rights and national security. In this talk, two social infrastructure information technologies are introduced. Personal Identifier (PID) system is an infrastructure for bidirectional mutual authentication, which will be used for electric commerce and governmental services. An RF-ID tag system is also important technology to implement efficient management of products and economic activities. Using PID and RF-ID tags, we can bridge a gap between the real world and the virtual one on computers automatically. We call the society, in which all persons and goods have their own digital names (identifiers) and are recognizable both in the real and virtual world, Digitally Named World. The systems require advanced technologies of SoC, networking, security and software. Here, technical challenges and social requirements for the new technologies are discussed. Some people are afraid of the infringement of their privacy in the digitally named world. Our discussions also include the technology to protect privacy and individual rights as well as efficiency and stability of our society.


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2005

Bitwidth Optimization for Low Power Digital FIR Filter Design

Kosuke Tarumi; Akihiko Hyodo; Masanori Muroyama; Hiroto Yasuura

We propose a novel approach for designing a low power datapath in wireless communication systems. Especially, we focus on the digital FIR filter. Our proposed approach can reduce the power consumption and the circuit area of the digital FIR filter by optimizing the bitwidth of the each filter coefficient with keeping the filter calculation accuracy. At first, we formulate the constraints about keeping accuracy of the filter calculations. We define the problem to find the optimized bitwidth of each filter coefficient. Our defined problem can be solved by using the commercial optimization tool. We evaluate the effects of consuming power reduction by comparing the digital FIR filters designed in the same bitwidth of all coefficients. We confirm that our approach is effective for a low power digital FIR filter.


Ipsj Digital Courier | 2006

Unlinkable Identification for Large-scale RFID Systems

Yasunobu Nohara; Toru Nakamura; Kensuke Baba; Sozo Inoue; Hiroto Yasuura

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Sozo Inoue

Kyushu Institute of Technology

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