Hiroyuki Chishiro

Semi-Fixed-Priority Scheduling: New Priority Assignment Policy for Practical Imprecise Computation

This paper proposes semi-fixed-priority scheduling to achieve both low-jitter and high schedulability. Semi-fixed-priority scheduling is for the extended imprecise computation model, which has a wind-up part as a second mandatory part and schedules the part of each extended imprecise task with fixed-priority. This paper also proposes a novel semi-fixed-priority scheduling algorithm based on Rate Monotonic (RM), called Rate Monotonic with Wind-up Part (RMWP). RMWP limits executable ranges of wind-up parts to minimize jitter. The schedulability analysis proves that one task set is feasible by RMWP if the task set is feasible by RM. Simulation results show that RMWP has both lower jitter and higher schedulability than RM.

RT-Est: Real-Time Operating System for Semi-fixed-Priority Scheduling Algorithms

This paper presents RT-Est, which is a real-time operating system for semi-fixed-priority scheduling algorithms. RT-Est implements the following mechanisms: (i) the hybrid O(1) scheduler, which is an extension of the O(1) scheduler in Linux kernel 2.6, to achieve semi-fixed-priority scheduling with low overhead, (ii) the high resolution timer, which performs to terminate optional parts at optional deadlines, (iii) SIM, which is an architecture for simulating real-time scheduling. Experimental evaluations show that semi-fixed-priority scheduling is well suited to autonomous mobile robots.

Global Semi-fixed-priority Scheduling on Multiprocessors

Current real-time systems such as robots have multiprocessors and the number of processors tends to be increased. In order to achieve these real-time systems, global real-time scheduling has been required. Many real-time scheduling algorithms are usually based on Liu and Laylands model. Compared to Liu and Laylands model, the imprecise computation model is one of the techniques to overcome the gap between theory and practice. Semi-fixed-priority scheduling is part-level fixed-priority scheduling in the extended imprecise computation model, which has a second mandatory part to terminate an optional part. Unfortunately, current semi-fixed-priority scheduling is only adapted to uniprocessors. This paper presents a global semi-fixed-priority scheduling algorithm, called Global Rate Monotonic with Wind-up Part (G-RMWP). G-RMWP calculates the optional deadline, the termination time of each optional part, by Response Time Analysis for Global Rate Monotonic (G-RM). The schedulability analysis shows that one task set is schedulable by G-RMWP if the task set is schedulable by G-RM. Simulation results show that G-RMWP has higher schedulability than G-RM.

Experimental Evaluation of Global and Partitioned Semi-Fixed-Priority Scheduling Algorithms on Multicore Systems

Nowadays multicore systems have been used in real-time applications such as robots. In robots, imprecise tasks such as image processing tasks are required to detect and avoid objects. However, existing real-time operating systems have evaluated multiprocessor real-time scheduling algorithms in Liu and Lay lands model and have not evaluated those in the imprecise computation model. This paper performs experimental evaluations of global and partitioned semi-fixed-priority scheduling algorithms in the extended imprecise computation model on multicore systems. Experimental results show that semi-fixed-priority scheduling has comparable overhead to fixed-priority scheduling. In addition, global semi-fixed-priority scheduling has lower overhead than partitioned semi-fixed-priority scheduling.

RT-Seed: Real-Time Middleware for Semi-Fixed-Priority Scheduling

The continuing economic boom has seen that many people become interested in automated trading systems with timing constraints and quality of service, called real-time trading systems. In order to realize such real-time trading systems, multi-/many-core processors are required. However, real-time trading systems are somewhat complex, and real-time operating systems struggle to offer continuous support because of their customization, robustness, maintainability, and portability compared with real-time middleware. An imprecise computation model is employed to support these trading systems, and semi-fixed-priority scheduling is a representative imprecise real-time scheduling technique for multi-/many-core processors. Unfortunately, there is no real-time middleware that supports semi-fixed-priority scheduling. This paper presents the RT-Seed real-time middleware, which implements a semi-fixed-priority scheduling algorithm, called Partitioned Rate Monotonic with Wind-up Part (P-RMWP), on Linux. P-RMWP supports the parallel-extended imprecise computation model that executes optional parts in parallel, called parallel optional parts. This paper also describes how to terminate parallel optional parts in the user space. The performance of P-RMWP is evaluated using Intels Xeon Phi many-core system.

Optimal Multiprocessor Real-Time Scheduling Based on RUN with Voltage and Frequency Scaling

This paper proposes Reduction to Uniprocessor Transformation (RUNT), which is an optimal multiprocessor real-time scheduling algorithm based on RUN with Real-Time Static Voltage and Frequency Scaling, called S-RUNT, and Real-Time Dynamic Voltage and Frequency Scaling, called D-RUNT. D-RUNT uses Enhanced Cycle-Conserving Earliest Deadline First to make use of slack produced during execution. In addition, we prove the optimality and analyze the overhead of RUNT.

Practical Imprecise Computation Model: Theory and Practice

We introduce the research overview of the practical imprecise computation model to achieve imprecise real-time applications. The practical imprecise computation model has multiple mandatory parts as real-time parts and multiple optional parts as non-real-time parts. We explain a new concept of real-time scheduling in the practical imprecise computation model, called semi-fixed-priority scheduling. In addition, we explain a semi-fixed-priority scheduling algorithm, called Rate Monotonic with Wind-up Part (RMWP). RMWP schedules each part in the practical imprecise computation model in Rate Monotonic order. We also introduce a real-time operating system for semi-fixed-priority scheduling algorithms, called RT-Est. We describe programming paradigms for the practical imprecise computation model in RT-Est. RT-Est has the SIM architecture for simulating real-time scheduling algorithms and the visualization tool for drawing simulation results. Finally we give future research directions for the practical imprecise computation model in theory and practice.

Dynamic Voltage and Frequency Scaling for Real-Time Scheduling on a Prioritized SMT Processor

Cyber Physical Systems are composed of many embedded systems which monitor and control the physical processes for tight integrations of computation and physical processes. Such embedded systems require not only real-time capabilities but also high throughput and low power consumption. High throughput is mainly achieved by parallel architectures such as Simultaneous Multithreading (SMT) and Chip Multiprocessor (CMP), and low power consumption is mainly achieved by Real-Time Dynamic Voltage and Frequency Scaling (RT-DVFS) under the real-time constraint. In this paper, we present a RT-DVFS algorithm called Hetero Efficiency to Logical Processor (HeLP) which can reduce power consumption easily and effectively in prioritized SMT processors. We also present Hetero Efficiency to Logical Processor with Temporal Migration (HeLP-TM) which applies the temporal migration technique to HeLP. Simulation results show that HeLP can reduce power consumption effectively and HeLPTM is more effective than HeLP.

Parallel Responsive Task on Dependable Responsive Multithreaded Processor II

Cyber-Physical Systems (CPS) are tight integrations of computational and physical worlds for various kinds of applications. For example, a humanoid robot, which is a typical application of CPS, has required timing constraints, low-latency execution, and parallel processing to achieve fine-grained real-time execution. Therefore low-latency parallel real-time computing is an important factor for CPS. In order to achieve such CPS applications, commercial off-the-shelf systems including processors and operating systems are difficult due to many requirements including such system performance and space constraints, and hence proprietary systems are favored. We had developed Dependable Responsive Multithreaded Processor I (D-RMTP I), which has one Responsive Multithreaded Processing Unit (RMT PU) with an 8-way prioritized Simultaneous Multithreading architecture, for parallel real-time computing. In addition, we have developed a high-end processor of D-RMTP I, called Dependable Responsive Multithreaded Processor II (D-RMTP II). D-RMTP II has two RMT PUs for high throughput and eight Flower cores for I/O processing. Our previous work presented Responsive Task, which is a low-latency real-time task with the interrupt wake-up structure to occupy a hardware thread in D-RMTP I for fine-grained real-time execution. Responsive Task can be executed in dozens of microsecond periods with low-jitter though executing real-time tasks simultaneously. Unfortunately, Responsive Task does not support parallel computing. This paper presents Parallel Responsive Task, which is an extension to Responsive Task for parallel computing on D-RMTP II. Evaluations show that Parallel Responsive Task improves the throughput and achieves fine-grained real-time execution with reasonable overhead.

Responsive Multithreaded Processor for Hard Real-Time Robotic Applications

Distributed real-time systems such as automated factories, space-crafts, and robots are generally built with a set of hardware and software components designed for specific control functions with time constraints. Various key technologies including real-time processing architecture, real-time communication, a DVFS (Dynamic Voltage and Frequency Scaling) mechanism, and a real-time operating system are required to build these applications. A humanoid robot, which the authors have chosen as an authors’ target application, requires a very small controller that consists of an SiP (System-in-Package), which is composed of an SoC (System-on-Chip), DRAMs, flash memories, and power units. In this chapter, the authors present the fundamental technology on dependable SoCs and SiPs for embedded real-time systems. In particular, D-RMTP (Dependable Responsive MultiThreaded Processor), real-time operating systems, and the co-design of SoC and SiP are introduced.