Nobuyuki Yamasaki

Semi-partitioned Scheduling of Sporadic Task Systems on Multiprocessors

This paper presents a new algorithm for scheduling of sporadic task systems with arbitrary deadlines on identical multiprocessor platforms. The algorithm is based on the concept of semi-partitioned scheduling, in which most tasks are fixed to specific processors, while a few tasks migrate across processors. Particularly, we design the algorithm so that tasks are qualified to migrate only if a task set cannot be partitioned any more, and such migratory tasks migrate from one processor to another processor only once in each period. The scheduling policy is then subject to Earliest Deadline First. Simulation results show that the algorithm delivers competitive scheduling performance to the state-of-the-art, with a smaller number of context switches.

Portioned EDF-based scheduling on multiprocessors

This paper presents an EDF-based algorithm, called Earliest Deadline Deferrable Portion (EDDP), for efficient scheduling of recurrent real-time tasks on multiprocessor systems. The design of EDDP is based on the portioned scheduling technique which classifies each task into a fixed task or a migratable task. A fixed task is scheduled on the dedicated processor without migrations. A migratable task is meanwhile permitted to migrate between the particular two processors. In order to curb the cost of task migrations, EDDP makes at most M -- 1 migratable tasks on M processors. The scheduling analysis derives the condition for a given task set to be schedulable. It is also proven that no tasks ever miss deadlines, if the system utilization does not exceed 65%. Beyond the theoretical analysis, the effectiveness of EDDP is evaluated through simulation studies. Simulation results show that EDDP achieves high system utilization with a small number of preemptions, compared with the traditional EDF-based algorithms.

Real-Time Scheduling with Task Splitting on Multiprocessors

This paper presents a real-time scheduling algorithm with high schedulability and few preemptions for multiprocessor systems. The algorithm is based on an unorthodox method called portioned scheduling that assigns each task to a particular processor like partitioned scheduling but can split a task into two processors if there is not enough capacity remaining on a processor. We describe an algorithm for assigning tasks to processors as well as an algorithm for scheduling the assigned tasks on per-processor. The schedulability analysis provides a formula to calculate the upper bound of the schedulable per-processor utilization for the algorithm. We then prove that the least upper bound of the whole system utilization is 50%. In addition, we propose heuristic procedures to improve schedulability. The simulation results show that the algorithm can often successfully schedule a task set with system utilization much higher than 50%, though the least upper bound is 50%. We also show that the algorithm achieves higher schedulability with fewer preemptions compared to the existing algorithms.

Semi-partitioned Fixed-Priority Scheduling on Multiprocessors

This paper presents a new algorithm for fixed-priority scheduling of sporadic task systems on multiprocessors.The algorithm is categorized to such a scheduling class that qualifies a few tasks to migrate across processors, while most tasks are fixed to particular processors. We design the algorithm so that a task is qualified to migrate, only if it cannot be assigned to any individual processors, in such a way that it is never returned to the same processor within the same period, once it is migrated from one processor to another processor. The scheduling policy is then conformed to Deadline Monotonic. According to the simulation results, the new algorithm significantly outperforms the traditional fixed-priority algorithms in terms of schedulability.

Work-Conserving Optimal Real-Time Scheduling on Multiprocessors

Extended T-N plane abstraction (E-TNPA) proposed in this paper realizes work-conserving and efficient optimal real-time scheduling on multiprocessors relative to the original T-N plane abstraction (TNPA). Additionally a scheduling algorithm named NVNLF (no virtual nodal laxity first) is presented for E-TNPA. E-TNPA and NVNLF relax the restrictions of TNPA and the traditional algorithm LNREF, respectively. Arbitrary tasks can be preferentially executed by both tie-breaking rules and time apportionment policies in accordance with various system requirements with several restrictions. Simulation results show that E-TNPA significantly reduces the number of task preemptions as compared to TNPA.

Portioned static-priority scheduling on multiprocessors

This paper proposes an efficient real-time scheduling algorithm for multiprocessor platforms. The algorithm is a derivative of the rate monotonic (RM) algorithm, with its basis on the portioned scheduling technique. The theoretical design of the algorithm is well implementable for practical use. The schedulability of the algorithm is also analyzed to guarantee the worst-case performance. The simulation results show that the algorithm achieves higher system utilizations, in which all tasks meet deadlines, with a small number of preemptions compared to traditional algorithms.

Active interface for human-robot interaction

In the near future, robots used by human-like personal computers will appear in office or at home. In this paper, we call these robots personal robots. A personal robot can be thought as a small autonomous mobile robot. First, we discuss a user interface design for personal robots in the face-to-face situation. Second, we consider the features of personal robots and their environments, and propose a new user interface concept for a personal robot an active interface. To show the effectiveness of the active interface, we design and implement a speech dialogue system called Chaser for human-robot interaction based on the active interface.

Responsive multithreaded processor for distributed real-time systems

The Responsive MultiThreaded (RMT) Processor is a system LSI that integrates almost all functions for parallel/distributed real-time systems including robots, intelligent rooms/buildings, ubiquitous computing systems, and amusement systems. Concretely, the RMT Processor integrates real-time processing (RMT Processing Unit), real-time communication (Responsive Link II), computer I/O peripherals (DDR SDRAM I/Fs, DMAC, PCI-X, USB2.0, IEEE1394, etc.), and control I/O peripherals (PWM generators, pulse counters, etc.). The RMT Processor, with a design rule of 0.13μm CMOS Cu 1P8M and a die size 10.0mm square, was fabricated by TSMC. The RMT Processing Unit (RMT PU) executes eight prioritized threads simultaneously using fine-grained multithreading based on priority, called the RMT architecture. Priority of real-time systems is introduced into all functional units, including cache, fetch, and execution, so the RMT PU guarantees real-time execution of prioritized threads. If resource conflicts occur at functional units, higher priority threads overtake lower priority threads. Flexible powerful vector operation units for multimedia processing are also designed. System designers use on-chip functions easily by connecting required I/Os to this chip and the designers realize distributed control by connecting several RMT Processors with their own functions via Responsive Link II.

Energy-Efficient Optimal Real-Time Scheduling on Multiprocessors

Optimal real-time scheduling is effective to not only schedulability improvement but also energy efficiency for real-time systems. In this paper, we propose real-time static voltage and frequency scaling (RT-SVFS) techniques based on an optimal real-time scheduling algorithm for multiprocessors. The techniques are theoretically optimal when the voltage and frequency can be controlled both uniformly and independently among processors. Simulation results show that the independent RT-SVFS technique closely approaches the lower bound on energy consumption if the voltage and frequency can be controlled minutely.

Responsive processor for parallel/distributed real-time control

This paper describes the design and implementation of a responsive processor (RP) for parallel/distributed real-time control, which can control various embedded systems including robots, home automation, factory automation, etc. RP integrates an MPU core (SPARC), four responsive links (RLs) for real-time communication, and many peripheral functions including SDRAM I/F, DMAC, PCI, USB, PWM generators, pulse counters, A/D converters, D/A converters, etc., in an ASIC chip. At the core part of the chip, RL provides the scalable real-time communication by four pairs of a full-duplex event link and a full-duplex data,link. Each packet on the link is prioritized to enable overtaking and shortcut routing. Many kinds of control systems can be composed by connecting RPs using RLs.