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Dive into the research topics where Hisao Kawaura is active.

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Featured researches published by Hisao Kawaura.


Applied Physics Letters | 2003

Nanometer-scale switches using copper sulfide

Toshitsugu Sakamoto; Hiroshi Sunamura; Hisao Kawaura; Tsuyoshi Hasegawa; Tomonobu Nakayama; Masakazu Aono

We describe a nanometer-scale switch that uses a copper sulfide film and demonstrate its performance. The switch consists of a copper sulfide film, which is a chalcogenide semiconductor, sandwiched between copper and metal electrodes. Applying a positive or negative voltage to the metal electrode can repeatedly switch its conductance in under 100 μs. Each state can persist without a power supply for months, demonstrating the feasibility of nonvolatile memory with its nanometer scale. While biasing voltages, copper ions can migrate in copper sulfide film and can play an important role in switching.


international solid-state circuits conference | 2004

A nonvolatile programmable solid electrolyte nanometer switch

Shunichi Kaeriyama; Toshitsugu Sakamoto; Hiroshi Sunamura; Masayuki Mizuno; Hisao Kawaura; Tsuyoshi Hasegawa; Kazuya Terabe; Tomonobu Nakayama; Masakazu Aono

A reconfigurable LSI employing a nonvolatile nanometer-scale switch, NanoBridge, is proposed, and its basic operations are demonstrated. The switch, composed of solid electrolyte copper sulfide, has a <30-nm contact diameter and <100-/spl Omega/ on-resistance. Because of its small size, it can be used to create extremely dense field-programmable logic arrays. A 4 /spl times/ 4 crossbar switch and a 2-input look-up-table circuit are fabricated with 0.18-/spl mu/m CMOS technology, and operational tests with them have confirmed the switchs potential for use in programmable logic arrays. A 1-kb nonvolatile memory is also presented, and its potential for use as a low-voltage memory device is demonstrated.


Applied Physics Letters | 2003

DNA size separation using artificially nanostructured matrix

Masakazu Baba; Toru Sano; Noriyuki Iguchi; Kazuhiro Iida; Toshitsugu Sakamoto; Hisao Kawaura

We have demonstrated two types of size separation of biomolecules using a nanostructured matrix artificially fabricated using electron-beam lithography: sieve-type separation using a regular pillar array structure and size exclusion chromatography (SEC) type separation using a structure with narrow and wide gaps. With these devices, samples of double-stranded DNA molecules (2, 5, and 10 k base pairs) were clearly separated into bands; smaller molecules eluted earlier in the sieve type while they eluted later in the SEC type. The nanostructured matrix enables various types of molecular separation by changing the design of the nanostructure. Moreover, it should be easy to integrate the matrix with other biomolecular fluidic devices because it does not require a filling medium.


Applied Physics Letters | 2000

Observation of source-to-drain direct tunneling current in 8 nm gate electrically variable shallow junction metal–oxide–semiconductor field-effect transistors

Hisao Kawaura; Toshitsugu Sakamoto; Toshio Baba

We investigated quantum mechanical effects in electrically variable shallow junction metal–oxide–semiconductor field-effect transistors with an 8 nm long gate. We clearly observed the direct tunneling current from the source to the drain below 77 K, in good agreement with the calculation. We also showed that the direct tunneling current will exceed the thermal current and will become detrimental to low-voltage operation of MOSLSIs in the 5 nm gate generation.


IEEE Transactions on Electron Devices | 2000

Transistor characteristics of 14-nm-gate-length EJ-MOSFETs

Hisao Kawaura; Toshitsugu Sakamoto; Toshio Baba; Yukinori Ochiai; Jun-ichi Fujita; J. Sone

We have fabricated electrically variable shallow junction metal-oxide-silicon field-effect transistors (EJ-MOSFETs) to investigate transport characteristics of ultrafine gate MOSFETs. By using EB direct writing on an ultrahigh-resolution negative resist (calixarene), we could achieved a gate length of only 14 nm. Despite such an ultrafine gate, the device exhibited transistor operation at room temperature. From studying the devices with the gate lengths from 14 nm to 98 nm, we found that when the gate length was below 30 nm the subthreshold leakage current increased. The low-temperature measurements showed that the leakage current was caused by the classical thermal process and that quantum effects do not play an important role in subthreshold characteristics at room temperature.


Applied Physics Letters | 1998

SINGLE-ELECTRON TRANSISTORS FABRICATED FROM A DOPED-SI FILM IN A SILICON-ON-INSULATOR SUBSTRATE

Toshitsugu Sakamoto; Hisao Kawaura; Toshio Baba

We propose doped-thin-Si-film single-electron transistors (DS-SETs), which are fabricated from a highly doped Si film in a silicon-on-insulator substate by electron-beam lithography with a high-resolution resist (calixarene) and dry etching with CF4 gas. Because the structure can be well controlled, the DS-SET with a 45-nm-diam island shows nearly ideal characteristics of SETs with a charging energy of 1.4 meV. The results demonstrate that single-electron tunneling occurs through a single island without any isolated islands formed in potential fluctuations. We also discuss the discreteness of energy levels in a Si island.


Japanese Journal of Applied Physics | 2006

Switching property of atomic switch controlled by solid electrochemical reaction

Takuro Tamura; Tsuyoshi Hasegawa; Kazuya Terabe; Tomonobu Nakayama; Toshitsugu Sakamoto; Hajime Sunamura; Hisao Kawaura; Sumio Hosaka; Masakazu Aono

We measured the switching time of an atomic switch that is operated by controlling the formation and annihilation of an atomic bridge in a nanogap between two electrodes using solid electrochemical reaction. The switching time becomes exponentially shorter with increasing the switching bias voltage. This exponential relation indicates that the switching time is determined by the solid electrochemical reaction, which is supported by theoretical estimation using a simple model. These results suggest the possibility that the atomic switch can be operated as fast as semiconductor devices currently used.


device research conference | 1997

Transistor operations in 30-nm-gate-length EJ-MOSFETs

Hisao Kawaura; T. Sakamoto; T. Baba; Y. Ochiai; J. Fujita; S. Matsui; J. Sone

Discusses fabrication of electrically variable shallow junction MOSFETs (EJ-MOSFETs) to investigate transistor characteristics in ultra-fine gate MOSFETs. By using electron beam (EB) lithography and an ultra-high resolution resist (Calixarene), we could achieve a gate length of 30 nm for the first time. Since the short-channel effects are effectively suppressed by electrically induced ultra-shallow source/drain regions in the structure, the fabricated device exhibited normal transistor characteristics in the 30-nm-gate-length regime at 300 K.


Journal of Physics: Conference Series | 2007

Material dependence of switching speed of atomic switches made from silver sulfide and from copper sulfide

Takuro Tamura; Tsuyoshi Hasegawa; K. Terabe; Tomonobu Nakayama; Toshitsugu Sakamoto; Hiroshi Sunamura; Hisao Kawaura; Sumio Hosaka; Masakazu Aono

We developed an atomic switch consisting of an ionic and electronic mixed conductor electrode and a counter metal electrode, having a space of about 1 nm between them. Formation and annihilation of a conductive atomic bridge is controlled using a solid electrochemical reaction, which is caused by applying a certain bias voltage between the electrodes. In this study, we measured the switching time of atomic switches made of silver sulfide and copper sulfide. The switching times were different, and this difference can be attributed to the different activation energies and chemical potentials of the materials.


Japanese Journal of Applied Physics | 1997

Proposal of Pseudo Source and Drain MOSFETs for Evaluating 10-nm Gate MOSFETs

Hisao Kawaura; Toshitsugu Sakamoto; Toshio Baba; Yukinori Ochiai; Jun-ichi Fujita; Shinji Matsui; J. Sone

We propose a Pseudo source and drain metal oxide semiconductor field effect transistors (Ps-MOSFET) for investigating the electrical characteristics and physical phenomena in 10-nm gate MOSFETs. The Ps-MOSFET consists of a lower gate and an upper gate which electrically induce pseudo source and drain regions at the silicon surface. In this structure, the pseudo source/drain regions act as doped source/drain regions in a MOSFET. Since the pseudo source/drain regions are extremely shallow, short-channel effects are expected to be suppressed in this structure. To minimize the channel length and the leakage current, we optimized the substrate doping concentration to be approximately 1018 cm-3 by using a two-dimensional numerical simulation. In this case, we obtained a channel length of approximately 16 nm for 10-nm gate Ps-MOSFETs. Under this optimal doping condition, numerical calculations showed satisfactory transistor operations for the 10-nm gate Ps-MOSFETs: ON/OFF current ratio ?106 and subthreshold slope ?100 mV/decade. We also showed by calculation that the direct source-drain tunneling current was not negligible in the sub-10-nm regime.

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