Hitoshi Takemura

Evaluation of a 100 kV thermal field emission electron-beam nanolithography system

We report on the results of performance evaluation tests of a JEOL model JBX-9300FS electron- beam nanolithography system operating at 100 kV. The system was tested in the areas of lithographic resolution, stability, exposure uniformity, and pattern placement accuracy. A minimum spot size of 4 nm was measured at a current of 100 pA. The spot remained below 6.5 nm for beam currents up to 8 nA. Maximum digital to analog converter linearity and deflection amplifier errors were below 0.5 nm. Pattern placement accuracy in a 50 mm square area was found to be within ±16 nm and inside the 500 μm writing field within ±7 nm.

Development of nanometric electron‐beam lithography system (JBX‐5D II)

The production of VHSIC and microwave devices has shown that submicron lithography by e‐beam, optical, or x‐ray systems is rapidly becoming feasible. There is, however, a demand developing for a nanolithography tool for producing GaAs devices and for investigating the physics of scaling of silicon semiconductor devices. We have developed an electron beam lithography system, the JBX‐5D II, which is effective in fabricating both submicron and nanometric devices. The system employs a high brightness single crystal (100) LaB6 cathode and an in‐lens octupole deflector. The JBX‐5D II is fully computer controlled which permits automatic switching of the accelerating voltage between 50 and 25 kV, of writing modes between large and small currents, and of different scanning fields. The ability to switch writing modes permits rapid writing of devices with geometries as small as 10 nm with a fine beam and a coarser beam to be used on larger geometries. The present paper deals with some of the characteristics occurrin...

Performance of new E-beam lithography system JBX-9300FS

New electron beam lithography system, JBX-9300FS, was developed and evaluated. This system features a spot beam, vector beam-scanning system, and step and repeats stage. Minimum beam diameter is 4nm at 100k V and 7nm at 50kV. The beam scanning system incorporates a new 20-bit high resolution-high speed Digital to Analog converter and voltage amplifier (DAC/AMP). Maximum writing field sizes of scanning system are 0.5mm at 100kV with an address size of 1nm and 1.0mm at 50k V with an address size of 2nm. The maximum beam-scanning rate is 25MHz. The system features are a maximum writing area of 230mm square, and handling of 300mm wafers. It also achieves a stitching accuracy and an overlay accuracy of +/-20nm, and a positional accuracy of +/-25nm at an accelerating voltage of 50kV, which exceeded the specifications. This system is used for sub-0.1 @mm gate CMOS device development. Chemically amplified resists, NEB22A3 and UV5 are successfully used for making of 30-nm-width line patterns and 100-nm-diameter via-hole pattern, respectively.

100-kV high-resolution e-beam lithography system: JBX-9300FS

Electron beam lithography system JBX-9300FS has the specifications of high-resolution exposure down to 20nm line width and also of accuracy of 20nm field stitching and 25nm overlay for alignment exposure on wafer. In this paper we will introduce 100kV high voltage gun design, new functions of hardware and software and recent results of evaluation data of the system. It is expected that the high precision lithography with high accelerating fine beam by JBX-9300FS will greatly contribute to the use of not only direct writing for the development of next generation devices and the production of optical or communication devices but also the development and prototype production of new masks for Next Generation Lithography tools, such as x-ray, EUV, EPL, and LEEPL.

A thermally assisted field emission electron beam exposure system

Electron beamlithography is widely used to fabricate densely packed devices such as high‐frequency transistors, since optical lithography is unable to write the small patterns required for such devices. One major problem with micropattern writing with an electron beam exposure system, however, is slow writing speed; since the system has to write an extremely large number of patterns on low‐sensitivity resist with a highly focused beam, exposure times are quite long. To speed up the writing process, we have attached a thermal field emission gun to our electron beam exposure system. This gun is designed to increase the electron sourcebrightness and probe current density. In order to determine this new probe current density, we conducted an extensive evaluation on a complete lithography system which uses a thermal field emission gun. We have measured a current density of ∼1000 A/cm2 at an accelerating voltage of 25 kV and conclude that this lithography system can be put to practical use in production areas requiring high throughput and submicron exposures.

Development of a next-generation e-beam lithography system for 1-Gb DRAM masks

A new electron beam lithography system for masks needed in production of 1Gbit DRAM devices was developed and evaluated. The system features a variable shaped beam, 50 kV accelerating voltage, and a step and repeat stage, and incorporates new technologies, including a high resolution high current density electron optical system, a per-shot beam correction unit, a high precision beam detection system utilizing the curve fitting method, and a single-stage 20 bit beam deflection unit. The system achieves a minimum linewidth of 200 nm or less, pattern uniformity of 20 nm within field, and a positional accuracy, including field stitching accuracy, of 20nm within a field, resulting in an exposure speed at least 5 times faster than the existing model, the JBX-7000MVII.

Development of an electron-beam optical column for the mask lithography system

Mask accuracies for the newest and next generation devices are very tight. The SIA Roadmap indicates writing accuracies (CD uniformity) of 18 nm and 13 nm for 1-Gbit and 4-Gbit DRAM 4X reticles, respectively. To meet this challenge, a new electron optical column is being developed for an electron beam mask writing system. The column has a beam current density of 20 A/cm2 (50 kV), a beam blurring of 0.06 micrometer at a 16 micrometer2 beam size, and a total aberration of less than 0.05 micrometer at 1 mm deflection length. The key technologies for this column are as follows: (1) Shorter column length and wider beam half-angle for reduction of Coulomb interaction; (2) Per shot focus correction of space charge effect; (3) In-lens, single stage electrostatic beam deflection system with focus and astigmatism correction. In this paper, we report the simulation results of this electron optical column design.

Fabrication of grating patterns by e-beam lithography

Abstract Along with the development of optical communication, optical integrated devices are now making rapid progress, and especially the grating, which is of a periodic structure, is now playing an important role in a wide variety of fields. In recent years, there is an increasing need for smaller grating pitches, and not only semiconductors but also a variety of materials are used for substrates. Recently, we have established a technique to finely control the grating pitch to 1 nm, less than the pattern data unit (5nm), by E-beam (E-B) lithography. Also, the fabrication of gratings with phase shift has been simplified by changing the stage shift distance.

Development of a Next Generation E-Beam Lithography System

One of the keys for ULSI lithography at a feature size ranging from 180 nm to 150 nm is a stable supply of ultra high precision reticle masks. To meet this demand, we have developed a new electron beam lithography system for reticle masks which offers an exposure accuracy of 20 to 30 nm. The system features a variable shaped beam, 50 kV accelerating voltage, a step-and-repeat stage, nd incorporates new technologies. These include a high resolution-high current density electron optical system, a per-shot focus and shot time correction unit, a high precision beam measurement system utilizing the fitting function method, a single-stage 20 bit electrostatic beam deflection unit and beam-shot smoothing technology. The system achieves a minimum line width of 100 nm or less, a pattern size uniformity of 16 nm (3 sigma) within a field, a field stitching accuracy of plus or minus 19 nm or smaller, and a pattern placement accuracy of plus or minus 29 nm or smaller, resulting in an exposure speed of 3 to 5 times faster than the existing model.

Development of EB lithography system for next generation photomasks

A higher quality electron beam (EB) mask lithography system is now required in an advanced field aimed at 1 Gbit DRAM chips. For this purpose, photomask accuracies of 0.03 micrometers to 0.02 micrometers are needed, for the feasibility of an EB lithography system with these accuracy levels is discussed. The error sources of a commercial EB lithography system with a variable shaped beam system and step and repeat writing strategy are examined. The development plans to minimize these errors are described and early results, specifically the field stitching error, obtained from these developments are shown. The mean stitching error was +/- 0.023 micrometers and the random stitching error was +/- 0.030 micrometers . From the analysis of error budget, it is shown that a field stitching accuracy level of 0.02 micrometers will be attainable after the completion of above-mentioned development plans.