Hong-Quan Nguyen

The influences of surface treatment and gas annealing conditions on the inversion behaviors of the atomic-layer-deposition Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitor

The inversion behaviors of atomic-layer-deposition Al2O3/n-In0.53Ga0.47As metal-oxide-semiconductor capacitors are studied by various surface treatments and postdeposition annealing using different gases. By using the combination of wet sulfide and dry trimethyl aluminum surface treatment along with pure hydrogen annealing, a strong inversion capacitance-voltage (C-V) response is observed, indicating a remarkable reduction in interface trap state density (Dit) at lower half-part of In0.53Ga0.47As band gap. This low Dit was confirmed by the temperature independent C-V stretch-out and horizontal C-V curves. The x-ray photoelectron spectroscopy spectra further confirm the effectiveness of hydrogen annealing on the reduction of native oxides.

Effects of Wet Chemical and Trimethyl Aluminum Treatments on the Interface Properties in Atomic Layer Deposition of Al2O3 on InAs

The reduction of native oxides on an InAs surface using various wet and dry chemical treatments, including hydrochloric acid (HCl) treatment, sulfide treatment, and in situ trimethyl aluminum (TMA) treatment before the atomic layer deposition (ALD) of Al2O3 on InAs is studied. X-ray photoelectron spectrum (XPS) results show that the effect of surface cleaning by TMA was apparent almost after the first pulse but that TMA cleaning is not as effective as wet chemical surface cleaning. The combination of wet chemical treatment and TMA pretreatment is the most effective method for InAs surface cleaning, as indicated by the XPS analysis. Capacitance–voltage (C–V) and current density–voltage (J–V) characteristics on metal–oxide–semiconductor capacitance (MOSCAP) structures were also investigated to evaluate the Al2O3/n-InAs interface quality after different surface treatments, and the results are consistent with the XPS analysis.

Effect of graded-temperature arsenic prelayer on quality of GaAs on Ge/Si substrates by metalorganic vapor phase epitaxy

The growth of GaAs epitaxy on Ge/Si substrates with an arsenic prelayer grown with graded temperature ramped from 300 to 420u2009°C is investigated. It is demonstrated that the graded-temperature arsenic prelayer grown on a Ge/Si substrate annealed at 650u2009°C not only improves the surface morphology (roughness: 1.1u2009nm) but also reduces the anti-phase domains’ (APDs) density in GaAs epitaxy (dislocation density: ∼2u2009×u2009107u2009cm−2). Moreover, the unwanted interdiffusion between Ge and GaAs epitaxy is suppressed by using the graded-temperature arsenic prelayer due to the low energy of the Ge-As bond and the use of a low V/III ratio of 20.

Effect of substrate misorientation on the material properties of GaAs/Al0.3Ga0.7As tunnel diodes

The effect of substrate misorientation on the material quality of the N++–GaAs/P++–AlGaAs tunnel diodes (TDs) grown on these substrates is investigated. It is found that the misorientation influences both surface roughness and interface properties of the N++–GaAs/P++–AlGaAs TDs. Smooth surface (rms roughness: 1.54 A) and sharp interface for the GaAs/Al0.3Ga0.7As TDs were obtained when the (100) tilted 10° off toward [111] GaAs substrate was used. Besides, the oxygen content in N++–GaAs and P++–AlGaAs layers grown on the 10° off GaAs substrates was reduced due to the reduction of sticking coefficient and number of anisotropic sites.The effect of substrate misorientation on the material quality of the N++–GaAs/P++–AlGaAs tunnel diodes (TDs) grown on these substrates is investigated. It is found that the misorientation influences both surface roughness and interface properties of the N++–GaAs/P++–AlGaAs TDs. Smooth surface (rms roughness: 1.54 A) and sharp interface for the GaAs/Al0.3Ga0.7As TDs were obtained when the (100) tilted 10° off toward [111] GaAs substrate was used. Besides, the oxygen content in N++–GaAs and P++–AlGaAs layers grown on the 10° off GaAs substrates was reduced due to the reduction of sticking coefficient and number of anisotropic sites.

Growth of High-Quality In0:4Ga0:6N Film on Si Substrate by Metal Organic Chemical Vapor Deposition

High-quality In0.4Ga0.6N film grown on GaN/AlN/Si(111) templates was obtained by metal organic chemical vapor deposition (MOCVD) with negligible phase separation. A template of high-quality GaN grown on a Si(111) substrate using AlN buffer layers was used for subsequent In0.4Ga0.6N growth. The GaN layer was 0.6 µm thick with rocking-curve full width at half maximum (FWHM) for a GaN(002) peak better than 430 arcsec. The In0.4Ga0.6N film grown was 0.3 µm thick with a dislocation density of 6×107 cm-2 and X-ray (ω–2θ) FWHM better than 130 arcsec.

Control of metamorphic buffer structure and device performance of InxGa1−xAs epitaxial layers fabricated by metal organic chemical vapor deposition

Using a step-graded (SG) buffer structure via metal-organic chemical vapor deposition, we demonstrate a high suitability of In0.5Ga0.5As epitaxial layers on a GaAs substrate for electronic device application. Taking advantage of the techniques precise control, we were able to increase the number of SG layers to achieve a fairly low dislocation density (∼10(6) cm(-2)), while keeping each individual SG layer slightly exceeding the critical thickness (∼80 nm) for strain relaxation. This met the demanded but contradictory requirements, and even offered excellent scalability by lowering the whole buffer structure down to 2.3 μm. This scalability overwhelmingly excels the forefront studies. The effects of the SG misfit strain on the crystal quality and surface morphology of In0.5Ga0.5As epitaxial layers were carefully investigated, and were correlated to threading dislocation (TD) blocking mechanisms. From microstructural analyses, TDs can be blocked effectively through self-annihilation reactions, or hindered randomly by misfit dislocation mechanisms. Growth conditions for avoiding phase separation were also explored and identified. The buffer-improved, high-quality In0.5Ga0.5As epitaxial layers enabled a high-performance, metal-oxide-semiconductor capacitor on a GaAs substrate. The devices displayed remarkable capacitance-voltage responses with small frequency dispersion. A promising interface trap density of 3xa0×xa010(12) eV(-1) cm(-2) in a conductance test was also obtained. These electrical performances are competitive to those using lattice-coherent but pricey InGaAs/InP systems.

Effect of annealing processes on the electrical properties of the atomic layer deposition Al2O3/In0.53Ga0.47As metal oxide semiconductor capacitors

The influence of different annealing processes including post deposition annealing (PDA) and post metallization annealing (PMA) with various temperatures (250–400 °C) and ambient [N2 and forming gas (FG)] on the electrical characteristics of Pt/Al2O3/In0.53Ga0.47As MOSCAPs are systemically studied. Comparing to samples underwent high PDA temperature, the higher leakage current has been observed for all of samples underwent high PMA temperature. This has resulted in the degradation of capacitance–voltage (C–V) behaviors. In conjunction with the current–voltage (J–V) measurement, depth profiling Auger electron spectroscopy (AES) and high-resolution transmission electron microscopy (HRTEM) analyses evidence that the out-diffusion of metal into oxide layer is the main source of leakage current. The noticeable passivation effect on the Al2O3/InGaAs interface has also been confirmed by the samples that underwent PDA process.

Direct growth of a 40 nm InAs thin film on a GaAs/Ge heterostructure by metalorganic chemical vapor deposition

In this paper, the authors directly grew an InAs thin film (40u2009nm) by metalorganic chemical vapor deposition on GaAs/Ge substrates by using flow-rate modulation epitaxy with an appropriate V/III ratio. The growth of a high-quality InAs thin film with periodic 90° misfit dislocations was related to a uniform monolayer In atom distribution at the InAs/GaAs interface. The In monolayer effectively minimized the difference between surface energy and strain energy, producing a stable interface during material growth. The authors also found that a tightly controlled V/III ratio can improve the quality of the InAs islands on the GaAs/Ge heterostructures, though it is not the key factor in InAs thin-film growth.

The effect of CdS QDs structure on the InGaP/GaAs/Ge triple junction solar cell efficiency

This work describes optical and electrical characteristics of InGaP/GaAs/Ge triple-junction (T-J) solar cells with CdS quantum dots (QDs) fabricated by a novel chemical solution. With the anti-reflective feature at long wavelength and down-conversion at UV regime, the CdS quantum dot effectively enhance the overall power conversion efficiency more than that of a traditional GaAs-based device. Experimental results indicate that CdS quantum dot can enhance the short-circuit current by 0.33 mA/cm2, which is observed for the triple-junction solar cells with CdS QDs of about 3.5 nm in diameter. Moreover, the solar cell conversion efficiency is improved from 28.3% to 29.0% under one-sun AM 1.5 global illumination I–V measurement.

Investigation of Characteristics of Al2O3/n-In x Ga1−x As (x = 0.53, 0.7, and 1) Metal–Oxide–Semiconductor Structures

The electrical properties of Al2O3/n-InGaAs metal–oxide–semiconductor capacitors (MOSCAPs) with In content of 0.53, 0.7, and 1 (InAs) have been investigated. Results show small capacitance–voltage (C–V) frequency dispersion in accumulation (1.70% to 1.85% per decade) for these MOSCAPs, mostly being assigned to border traps in Al2O3. With higher In content, shorter minority-carrier response time and smaller C–V hysteresis are observed. The reduction of C–V hysteresis might be related to the reduction of Ga-bearing oxides in Al2O3/InGaAs interfaces as indicated by x-ray photoelectron spectroscopy.