Hongyu Yu

A Low Energy Oxide-Based Electronic Synaptic Device for Neuromorphic Visual Systems with Tolerance to Device Variation

Neuromorphic computing is an emerging computing paradigm beyond the conventional digital von Neumann computation. An oxide-based resistive switching memory is engineered to emulate synaptic devices. At the device level, the gradual resistance modulation is characterized by hundreds of identical pulses, achieving a low energy consumption of less than 1 pJ per spike. Furthermore, a stochastic compact model is developed to quantify the device switching dynamics and variation. At system level, the performance of an artificial visual system on the image orientation or edge detection with 16 348 oxide-based synaptic devices is simulated, successfully demonstrating a key feature of neuromorphic computing: tolerance to device variation.

A neuromorphic visual system using RRAM synaptic devices with Sub-pJ energy and tolerance to variability: Experimental characterization and large-scale modeling

We report the use of metal oxide resistive switching memory (RRAM) as synaptic devices for a neuromorphic visual system. At the device level, we experimentally characterized the gradual resistance modulation of RRAM by hundreds of identical pulses. As compared with phase change memory (PCM) reported recently in [1,2], >100×-1000× energy consumption reduction was achieved in RRAM as synaptic devices (<;1 pJ per spike). Based on the experimental results, we developed a stochastic model to quantify the device switching dynamics. At the system level, we simulated the performance of image orientation selectivity on a neuromorphic visual system which consists of 1,024 CMOS neuron circuits and 16,348 RRAM synaptic devices. It was found that the system can tolerate the temporal and spatial variability which are commonly present in RRAM devices, suggesting the feasibility of large-scale hardware implementation of neuromorphic system using RRAM synaptic devices.

Stochastic learning in oxide binary synaptic device for neuromorphic computing.

Hardware implementation of neuromorphic computing is attractive as a computing paradigm beyond the conventional digital computing. In this work, we show that the SET (off-to-on) transition of metal oxide resistive switching memory becomes probabilistic under a weak programming condition. The switching variability of the binary synaptic device implements a stochastic learning rule. Such stochastic SET transition was statistically measured and modeled for a simulation of a winner-take-all network for competitive learning. The simulation illustrates that with such stochastic learning, the orientation classification function of input patterns can be effectively realized. The system performance metrics were compared between the conventional approach using the analog synapse and the approach in this work that employs the binary synapse utilizing the stochastic learning. The feasibility of using binary synapse in the neurormorphic computing may relax the constraints to engineer continuous multilevel intermediate states and widens the material choice for the synaptic device design.

Highly Uniform, Self-Compliance, and Forming-Free ALD

Atomic layer deposited (ALD) HfO2 resistive-switching random access memory devices with high uniformity, self-compliance, and forming-free behavior are demonstrated. Through comparative experiments, we find that appropriate deposition techniques and annealing conditions lead to self-compliance. The forming-free behavior originates from the oxygen deficiency due to the metal doping layer. High uniformity, by first-principle calculation, is caused by Ge doping in the HfO2, which lowers the oxygen-vacancy formation energy.

\hbox{HfO}_{2}

In this letter, a bipolar resistive switching RAM based on Ni/AlO<i>y</i>/n⁺-Si which exhibits high potential to realize transistor-free operation for cross-bar array is successfully demonstrated. The proposed device shows well-behaved bipolar memory performance with self-rectifying behavior in low-resistance state (>; 700 at 0.2 V), a high on/off resistance ratio (>;10³), a good retention characteristic (>; 10⁴ s at 100 ^°C ), and a wide readout margin for cross-bar architecture (number of word line N >; 2⁵ for worst case condition).

-Based RRAM With Ge Doping

In this paper, we study the effect of highly doped n⁺/p⁺ Si as the bottom electrode on unipolar RRAM with Ni-electrode/ HfO<i>x</i> structure. With heavily doped p⁺-Si as the bottom electrode, RRAM devices illustrate the coexistence of the bipolar and the unipolar resistive switching. Meanwhile, by substituting heavily doped n⁺ -Si, the switching behavior changes to that of the self-rectifying unipolar device. The asymmetry and rectifying reproducible behavior in a n⁺-Si/HfO<i>x</i>/Ni device resulted from the Schottky barrier of defect states in the SiO<i>x</i>/HfO<i>x</i> junction and n⁺ Si substrate, but this behavior is not seen for the p⁺-Si bottom electrode case. With rectifying characteristics and high forward current density observed in the Ni/HfO<i>x</i>/n⁺Si device, the sneak current path in the conventional crossbar architecture was significantly suppressed. We believe that the proposed structure is a promising candidate for future crossbar-type RRAM applications.

A Self-Rectifying

In this letter, a unipolar resistive switching random access memory (RAM) based on NiSi/HfOx/TiN structure is demonstrated, which is compatible with NiSi S/D in advance CMOS technology process. Highlights of the demonstrated resistive RAM include the following: 1) CMOS-technology-friendly materials and process; 2) excellent self-rectifying behavior in low-resistance state (>; 103 at 1 V); 3) well-behaved memory performance, such as high on/off resistance ratio (>; 102) and good retention characteristics (>;105 s at 125 °C ); and 4) wide readout margin for high-density cross-point memory devices (number of word lines 106 for the worst case condition).

\hbox{AlO}_{y}

A conduction model consisting of two parallel resistances from a highly conductive filament region and a uniform leakage oxide region is proposed in this brief to represent the current conduction in the filament-type switching resistive random access memory cell. Low-frequency noise analysis of current fluctuation at different resistance states has been employed to verify its efficiency. It is found that, in the low-resistance regime, filament resistance dominates current conduction and noise varies as a power law of resistance, whereas in the high-resistance regime, uniform oxide leakage is the major source of conduction, giving rise to a nearly constant noise level.

Bipolar RRAM With Sub-50-

In this letter, new endurance degradation behaviors in the bipolar resistive random access memory devices with multilayered HfOx/TiOx are reported for the first time, showing almost a constant resistance in low resistance state and a gradually reduced resistance in high resistance state (HRS). Further investigations into the dependence of HRSs degradation speed on switching voltage and temperature reveal that the degradation is attributed to the oxygen ion (O2-) loss effect during RESET process, which leads to the insufficient O2- supply for recombining the oxygen vacancies. Possible technical solutions are then proposed to improve the endurance performance.

\mu\hbox{A}

In this letter, we report positive bias-induced V_th instability in single and multilayer graphene field effect transistors (GFETs) with back-gate SiO₂ dielectric. The ΔV_th of GFETs increases as stressing time and voltage increases, and tends to saturate after long stressing time. In the meanwhile, it does not show much dependence on gate length, width, and the number of graphene layers. The 1/f noise measurement indicates no newly generated traps in SiO₂/graphene interface caused by positive bias stressing. Mobility is seen to degrade with temperature in- creasing. The degradation is believed to be caused by the trapped electrons in bulk SiO₂ or SiO₂/graphene interface and trap generation in bulk SiO₂.