Wen-Jun Liu

Temperature Instability of Resistive Switching on

In this letter, the temperature instability of HfOx -based resistive switching memory is investigated. It is observed that with the increase of high temperature (up to 100 °C in this work), the leakage current of high-resistance state would increase, and the set/reset voltages would decrease. In addition, multibit switching exhibited at room temperature might not be retained with the increase of temperature. All these phenomena can be correlated with oxygen-vacancy-related trap formation and annihilation.

\hbox{HfO}_{x}

Our recent investigations and understanding of the negative bias temperature instability (NBTI) degradation in p-MOSFETs with ultrathin SiON gate dielectric are reviewed. The progressive understanding of NBTI mechanism is mainly related to the novel measurement techniques we developed. We show in this paper the following: 1) For the conventional charge pumping and direct-current current-voltage interface trap measurement, the interface trap density Nit is underestimated due to the recovery during measurement delay. The existing Nit data should be reexamined; 2) an ultrafast pulsed I-V method [fast pulsed measurement (FPM)] is developed to measure DeltaVth with measurement time tM = 100 ns. It can be considered as free from recovery during measurement; 3) due to the degradation during the initial threshold voltage measurement, the existing slow on-the-fly (OTF) DeltaVth measurement distorts (overestimates) the slope and induces a kink at early stress time in the Log-Log curve of the time evolution of NBTI degradation. A fast OTF DeltaVth measurement method is developed to overcome this problem; 4) a novel OTF interface trap (OFIT) measurement method is developed which is free from interface trap recovery during measurement. The OFIT measurement provides the most reliable data to inspect the interface trap R-D model; 5) combining the OFIT and FPM measurements, we decompose the NBTI DeltaVth into two components: A slow DeltaVth it component contributed by with a slow recovery time longer than 50mus and a fast DeltaVth ox component contributed by DeltaVox with a broad spectrum of recovery time, including a component with very fast recovery time (100 ns); and 6) the dynamic degradation by DeltaVth it component is frequency-independent and can be measured by a dc method, whereas the dynamic degradation DeltaVth ox by component measured by FPM is increased by increasing frequency. The ten-year lifetime of the p-MOSFETs is mainly determined by the degradation of the DeltaVth it component.

-Based RRAM Devices

Atomic layer deposited (ALD) HfO2 resistive-switching random access memory devices with high uniformity, self-compliance, and forming-free behavior are demonstrated. Through comparative experiments, we find that appropriate deposition techniques and annealing conditions lead to self-compliance. The forming-free behavior originates from the oxygen deficiency due to the metal doping layer. High uniformity, by first-principle calculation, is caused by Ge doping in the HfO2, which lowers the oxygen-vacancy formation energy.

Understand NBTI Mechanism by Developing Novel Measurement Techniques

In this letter, a resistive random access memory based on Ni electrode/HfOx, dielectric/n+ Si substrate structure is demonstrated, which can be integrated with Si diode as selector for application in crossbar architecture. The unipolar device shows well-behaved memory performance, such as high ON/OFF resistance ratio (>; 103), good retention characteristics (>; 105 s at 150 °C), satisfactory pulse switching endurance (>; 105 cycles), and a fast programming speed of about 50 ns. More importantly, it also exhibits almost 100% device yield on a 6-in wafer.

Highly Uniform, Self-Compliance, and Forming-Free ALD

Biaxially stretchable silver nanowire transparent conductors are demonstrated. The silver nanowire film retains its electrical conductivity up to 10% applied strain. We examine the factors limiting stretchability and compare the mechanics of biaxially and uniaxially stretchable systems, which will be useful for exploring biaxially stretchable systems in future.

\hbox{HfO}_{2}

For the first time, we developed an on-the-fly method OFIT to measure the interface trap density N_IT without recovery during measurement. The OFIT produces the most reliable experimental data of the interface trap generation dynamics under stress and therefore provides a solid ground to check various modeling work. The slope n of tⁿ time evolution of DeltaN_IT under stress is temperature dependent, supporting dispersive Hydrogen transport in the oxide. Comparing OFIT data with the data measured by ultra-fast pulsed V_th measurement, we successfully decompose the NBTI DeltaV_TH into interface trap component DeltaV_TH ^IT and oxide charge component DeltaV_TH ^OX quantitatively for the p-MOSFETs with SiON gate dielectric.

-Based RRAM With Ge Doping

In this letter, a bipolar resistive switching RAM based on Ni/AlO<i>y</i>/n⁺-Si which exhibits high potential to realize transistor-free operation for cross-bar array is successfully demonstrated. The proposed device shows well-behaved bipolar memory performance with self-rectifying behavior in low-resistance state (>; 700 at 0.2 V), a high on/off resistance ratio (>;10³), a good retention characteristic (>; 10⁴ s at 100 ^°C ), and a wide readout margin for cross-bar architecture (number of word line N >; 2⁵ for worst case condition).

A High-Yield

In this paper, we study the effect of highly doped n⁺/p⁺ Si as the bottom electrode on unipolar RRAM with Ni-electrode/ HfO<i>x</i> structure. With heavily doped p⁺-Si as the bottom electrode, RRAM devices illustrate the coexistence of the bipolar and the unipolar resistive switching. Meanwhile, by substituting heavily doped n⁺ -Si, the switching behavior changes to that of the self-rectifying unipolar device. The asymmetry and rectifying reproducible behavior in a n⁺-Si/HfO<i>x</i>/Ni device resulted from the Schottky barrier of defect states in the SiO<i>x</i>/HfO<i>x</i> junction and n⁺ Si substrate, but this behavior is not seen for the p⁺-Si bottom electrode case. With rectifying characteristics and high forward current density observed in the Ni/HfO<i>x</i>/n⁺Si device, the sneak current path in the conventional crossbar architecture was significantly suppressed. We believe that the proposed structure is a promising candidate for future crossbar-type RRAM applications.

\hbox{HfO}_{x}

Black phosphorus (BP) has emerged as a promising two-dimensional (2D) material for next generation transistor applications due to its superior carrier transport properties. Among other issues, achieving reduced subthreshold swing and enhanced hole mobility simultaneously remains a challenge which requires careful optimization of the BP/gate oxide interface. Here, we report the realization of high performance BP transistors integrated with HfO2 high-k gate dielectric using a low temperature CMOS process. The fabricated devices were shown to demonstrate a near ideal subthreshold swing (SS) of ~69 mV/dec and a room temperature hole mobility of exceeding >400 cm2/Vs. These figure-of-merits are benchmarked to be the best-of-its-kind, which outperform previously reported BP transistors realized on traditional SiO2 gate dielectric. X-ray photoelectron spectroscopy (XPS) analysis further reveals the evidence of a more chemically stable BP when formed on HfO2 high-k as opposed to SiO2, which gives rise to a better interface quality that accounts for the SS and hole mobility improvement. These results unveil the potential of black phosphorus as an emerging channel material for future nanoelectronic device applications.

-Based Unipolar Resistive RAM Employing Ni Electrode Compatible With Si-Diode Selector for Crossbar Integration

A memory capacitor with a multistacked tunnel layer of Al2O3∕HfO2∕SiO2 (AHO) has been fabricated together with HfO2 charge trapping layer and Al2O3 control oxide layer. The resulting capacitor exhibits a memory window as large as 7.6V for ±12V sweep voltage range, a significant flatband voltage shift of 2.1V after 10V∕100μs programing as well as improved charge retention compared with a single SiO2 tunnel layer. The different memory effects in various sweep voltage ranges and enhanced retention characteristics have been explained based on the variable electrical thickness of the AHO stack under different electric fields.