Hoyeol Yun

Modification of Electrical Properties of Graphene by Substrate-Induced Nanomodulation

A periodically modulated graphene (PMG) generated by nanopatterned surfaces is reported to profoundly modify the intrinsic electronic properties of graphene. The temperature dependence of the sheet resistivity and gate response measurements clearly show a semiconductor-like behavior. Raman spectroscopy reveals significant shifts of the G and the 2D modes induced by the interaction with the underlying grid-like nanostructure. The influence of the periodic, alternating contact with the substrate surface was studied in terms of strain caused by bending of graphene and doping through chemical interactions with underlying substrate atoms. Electronic structure calculations performed on a model of PMG reveals that it is possible to tune a band gap within 0.14-0.19 eV by considering both the periodic mechanical bending and the surface coordination chemistry. Therefore, the PMG can be regarded as a further step toward band gap engineering of graphene devices.

Breakdown of the interlayer coherence in twisted bilayer graphene.

Coherent motion of electrons in Bloch states is one of the fundamental concepts of charge conduction in solid-state physics. In layered materials, however, such a condition often breaks down for the interlayer conduction, when the interlayer coupling is significantly reduced by, e.g., a large interlayer separation. We report that complete suppression of coherent conduction is realized even in an atomic length scale of layer separation in twisted bilayer graphene. The interlayer resistivity of twisted bilayer graphene is much higher than the c-axis resistivity of Bernal-stacked graphite and exhibits strong dependence on temperature as well as on external electric fields. These results suggest that the graphene layers are significantly decoupled by rotation and incoherent conduction is a main transport channel between the layers of twisted bilayer graphene.

Carbon Nanotube Field Effect Transistors with Suspended Graphene Gates

Novel field effect transistors with suspended graphene gates are demonstrated. By incorporating mechanical motion of the gate electrode, it is possible to improve the switching characteristics compared to a static gate, as shown by a combination of experimental measurements and numerical simulations. The mechanical motion of the graphene gate is confirmed by using atomic force microscopy to directly measure the electrostatic deflection. The device geometry investigated here can also provide a sensitive measurement technique for detecting high-frequency motion of suspended membranes as required, e.g., for mass sensing.

Rectifying Single GaAsSb Nanowire Devices Based on Self-Induced Compositional Gradients.

Device configurations that enable a unidirectional propagation of carriers in a semiconductor are fundamental components for electronic and optoelectronic applications. To realize such devices, however, it is generally required to have complex processes to make p-n or Schottky junctions. Here we report on a unidirectional propagation effect due to a self-induced compositional variation in GaAsSb nanowires (NWs). The individual GaAsSb NWs exhibit a highly reproducible rectifying behavior, where the rectifying direction is determined by the NW growth direction. Combining the results from confocal micro-Raman spectroscopy, electron microscopy, and electrical measurements, the origin of the rectifying behavior is found to be associated with a self-induced variation of the Sb and the carrier concentrations in the NW. To demonstrate the usefulness of these GaAsSb NWs for device applications, NW-based photodetectors and logic circuits have been made.

Mechanical properties of rippled structure in suspended stacks of graphene

We studied the mechanical properties of a suspended graphene layers which have ripples with stripe pattern, by using an atomic force spectroscopy. The local spring constant of the rippled graphene layer has larger value at concave region and smaller at convex region. The attractive force and pull-off force between a tip and the sample also have larger values at the concave region. A local spring constant mapping on the suspended graphene with ripple was obtained and nonlinear behavior of the force-distance curve was analyzed regarding local deformation of the sample.

Large scale MoS2 nanosheet logic circuits integrated by photolithography on glass

We demonstrate 500 × 500 μm2 large scale polygrain MoS2 nanosheets and field effect transistor (FET) circuits integrated using those nanosheets, which are initially grown on SiO2/p+–Si by chemical vapor deposition but transferred onto glass substrate to be patterned by photolithography. In fact, large scale growth of two-dimensional MoS2 and its conventional way of patterning for integrated devices have remained as one of the unresolved important issues. In the present study, we achieved maximum linear mobility of ~9 cm2 V−1 s−1 from single-domain MoS2 FET on SiO2/p+–Si substrate and 0.5~3.0 cm2 V−1 s−1 from large scale MoS2 sheet transferred onto glass. Such reduced mobility is attributed to the transfer process-induced wrinkles and crevices, domain boundaries, residue on MoS2, and loss of the back gate-charging effects that might exist due to SiO2/p+–Si substrate. Among 16 MoS2-based FETs, 13 devices successfully work (yield was more than 80%) producing NOT, NOR, and NAND logic circuits. Inverter (NOT gate) shows quite a high voltage gain over 12 at a supply voltage of 5 V, also displaying 60 μs switching speed in kilohertz dynamics.

Stencil Nano Lithography Based on a Nanoscale Polymer Shadow Mask: Towards Organic Nanoelectronics

A stencil lithography technique has been developed to fabricate organic-material-based electronic devices with sub-micron resolution. Suspended polymethylmethacrylate (PMMA) membranes were used as shadow masks for defining organic channels and top electrodes. Arrays of pentacene field effect transistors (FETs) with various channel lengths from 50 μm down to 500 nm were successfully produced from the same batch using this technique. Electrical transport measurements showed that the electrical contacts of all devices were stable and the normalized contact resistances were much lower than previously studied organic FETs. Scaling effects, originating from the bulk space charge current, were investigated by analyzing the channel-length-dependent mobility and hysteresis behaviors. This novel lithography method provides a reliable means for studying the fundamental transport properties of organic materials at the nanoscale as well as enabling potential applications requiring the fabrication of integrated organic nanoelectronic devices.

Fabrication and electrical properties of single wall carbon nanotube channel and graphene electrode based transistors arrays

A transistor structure composed of an individual single-walled carbon nanotube (SWNT) channel with a graphene electrode was demonstrated. The integrated arrays of transistor devices were prepared by transferring patterned graphene electrode patterns on top of the aligned SWNT along one direction. Both single and multi layer graphene were used for the electrode materials; typical p-type transistor and Schottky diode behavior were observed, respectively. Based on our fabrication method and device performances, several issues are suggested and discussed to improve the device reliability and finally to realize all carbon based future electronic systems.

Surface Modulation of Graphene Field Effect Transistors on Periodic Trench Structure

In this work, graphene field effect transistors (FETs) were fabricated on a trench structure made by carbonized poly(methylmethacrylate) to modify the graphene surface. The trench-structured devices showed different characteristics depending on the channel orientation and the pitch size of the trenches as well as channel area in the FETs. Periodic corrugations and barriers of suspended graphene on the trench structure were measured by atomic force microscopy and electrostatic force microscopy. Regular barriers of 160 mV were observed for the trench structure with graphene. To confirm the transfer mechanism in the FETs depending on the channel orientation, the ratio of experimental mobility (3.6-3.74) was extracted from the current-voltage characteristics using equivalent circuit simulation. It is shown that the number of barriers increases as the pitch size decreases because the number of corrugations increases from different trench pitches. The noise for the 140 nm pitch trench is 1 order of magnitude higher than that for the 200 nm pitch trench.

Quantum Hall conductance of graphene combined with charge-trap memory operation.

The combination of quantum Hall conductance and charge-trap memory operation was qualitatively examined using a graphene field-effect transistor. The characteristics of two terminal quantum Hall conductance appeared clearly on the background of a huge conductance hysteresis during a gate-voltage sweep for a device using monolayer graphene as a channel,hexagonal boron-nitride flakes as a tunneling dielectric and defective silicon oxide as the charge storage node. Even though there was a giant shift of the charge neutrality point, the deviation of quantized resistance value at the state of filling factor 2 was less than 1.6% from half of the von Klitzing constant. At high Landau level indices, the behaviors of quantum conductance oscillation between the increasing and the decreasing electron densities were identical in spite ofa huge memory window exceeding 100 V. Our results indicate that the two physical phenomena, two-terminal quantum Hall conductance and charge-trap memory operation, can be integrated into one device without affecting each other.