Hsin-Chang Lee

Evaluation of a new metrology technique to support the needs of accuracy, precision, speed, and sophistication in near-future lithography

A new metrology technique is being evaluated to address the need for accuracy, precision, speed and sophistication in metrology in near-future lithography. Attention must be paid to these stringent requirements as the current metrology capabilities may not be sufficient to support these near future needs. Sub-nanometer requirements in accuracy and precision along with the demand for increase in sampling triggers the need for such evaluation. This is a continuation of the work published at SPIE Asia conference, 2008. In this technical presentation the authors would like to continue on reporting the newest results from this evaluation of such technology, a new scatterometry based platform under development at ASML, which has the potential to support the future needs. Extensive data collection and tests are ongoing for both CD and overlay. Previous data showed overlay performance on production layers [1] that meet 22 nm node requirements. The new data discussed in this presentation is from further investigation on more process robust overlay targets and smaller target designs. Initial CD evaluation data is also discussed.

Global critical dimension uniformity improvement for mask fabrication with negative-tone chemically amplified resists by zone-controlled postexposure bake

The multizone hotplate approach of the APB5500 bake system achieves temperature uniformity significantly superior to conventional bake tools, resulting in unmatched global critical dimension (CD) uniformity from the postexposure bake (PEB) process. Progress toward 65-nm next-generation lithography, however, requires the application of negative-tone chemically amplified resists (nCARs) like NEB22. This nCAR is characterized to show a strong sensitivity to postexposure delay (PED) in vacuum during electron-beam writing of 0.5 nm/h, and also a strong PEB sensitivity of 7.8 nm/°C, both resulting in systematic CD errors. These CD errors are compensated with the APB5500 bake system during PEB by automatically applying an appropriate nonuniform temperature profile. This temperature profile is calculated by an algorithm considering the resist and mask heat transfer properties. A CD uniformity improvement from 8.9 to 6.7 nm total range (25%) on a state of the art production mask is achieved.

A scatterometry based CD metrology solution for advanced nodes, including capability of handling birefringent layers with uniaxial anisotropy

A brand new CD metrology technique that can address the need for accuracy, precision and speed in near future lithography is probably one of the most challenging items. CDSEMs have served this need for a long time, however, a change of or an addition to this traditional approach is inevitable as the increase in the need for better precision (tight CDU budget) and speed (driven by the demand for increase in sampling) continues to drive the need for advanced nodes. The success of CD measurement with scatterometry remains in the capability to model the resist grating, such as, CD and shape (side wall angle), as well as the under-lying layers (thickness and material property). Things are relatively easier for the cases with isotropic under-lying layers (that consists of single refractive or absorption indices). However, a real challenge to such a technique becomes evident when one or more of the under-lying layers are anisotropic. In this technical presentation the authors would like to evaluate such CD reconstruction technology, a new scatterometry based platform under development at ASML, which can handle bi-refringent non-patterned layers with uniaxial anisotropy in the underlying stack. In the RCWA code for the bi-refringent case, the elegant formalism of the enhanced transmittance matrix can still be used. In this paper, measurement methods and data will be discussed from several complex production stacks (layers). With inclusion of the bi-refringent modeling, the in-plane and perpendicular n and k values can be treated as floating parameters for the bi-refringent layer, so that very robust CD-reconstruction is achieved with low reconstruction residuals. As a function of position over the wafer, significant variations of the perpendicular n and k values are observed, with a typical radial fingerprint on the wafer, whereas the variations in the in-plane n and k values are seen to be considerably lower.

Application of Sigma7500 pattern generator to X architecture and 45-nm generation mask making

The mask cost is increasing substantially from generation to generation. Hence, reducing the mask cost is one of the most critical needs in developing a new generation of technology. Compared with variable shaped beam (VSB) e-beam tools, laser writers have the advantage of higher throughput and lower cost. Moreover, the writing time is not dependent on feature count but on the area written. Additionally the FEP-171 resist, which is used for the DUV laser writer, is also the resist used for VSB writers. This enables process sharing and reduces the number of processes needed for mask manufacturing. Finally the laser writer is expected to print Manhattan and X-architecture features with no major differences. Whereas, VSB e-beam tools take longer to write, if X features are included with Manhattan-type features. The inclusion of X features also worsens CD uniformity when written with VSB e-beam tools. The Sigma7500 DUV laser writer uses partially coherent imaging of a spatial light modulator (SLM) to maximize resolution, while providing 4-pass and 2-pass printings, corner enhancement, and grid matching. These functions are evaluated and the results are reported in this paper. Evaluation data shows that the global CD uniformity of dense line/space and isolated spaces is around 6 nm (3σ) for features at 0-, 45-, 90-, and 135-degree angles, which are used in the X architecture. The resolution of lines and spaces can both reach 150 nm. Based on our evaluation, the Sigma7500 can meet both critical 65-nm and sub-critical 45-nm generation mask specifications and reduces the writing cost by 40%. The writing time for X architecture patterns can be reduced by at least a factor of two as compared to VSB systems, while the CD performance remains comparable. However, the pattern fidelity is slightly worse and the CD of 45- and 135-degree lines is difficult to adjust independently. In addition, the Sigma7500 comes with a data-sizing function (ProcessEqualizer) to compensate for global CD signatures, but the potential impact of data sizing on OPC accuracy is a concern and it must be evaluated. Evaluation data shows that the Sigma7500 is capable of 45-nm node sub-critical mask production. Its advantages in high productivity and acceptable CD control should provide a solution to reduce the mask cost of advanced nodes.

Global CD uniformity improvement using dose modulation pattern correction of pattern density-dependent and position-dependent errors

The specification of mask global CD uniformity (GCDU) is ever tightening. There is no exception at the 65-nm node. Some of the key contributors affecting GCD non-uniformity is pattern-density effects such as fogging effect from the e-beam writer and macro loading effect from the etcher. In addition, the contributions from position-dependent effects are significant, and these contributions included resist developing, baking, as well as aberrations of the wafer-imaging lens. It is challenging to quantify these effects and even more so to correct them to improve the GCDU. Correction of the fogging and etch loading effects had been reported by various authors. In addition to correction for these effects, we are reporting the position-dependent effects in this paper. Currently, the fogging effect induces 5 nm of CD error and an additional 5~15 nm of CD errors is induced by the etch-loading effect within a 60-mm radius area. We improved the GCDU by pattern-dependent corrections. Using position-dependent dose correction in mask writing, we managed to effectively compensate for intra-field non-uniformity on wafer, which is induced by lens aberrations and illumination non-uniformity.

Automated CD-error compensation for negative-tone chemically amplified resists by zone-controlled post-exposure bake

Negative-tone chemically amplified resists (nCARs), like NEB22 are promising candidates for next-generation lithography, e.g. 90 nm and 65 nm technology node and next-generation lithography. For these resists, e-beam exposure and post-exposure bake (PEB) are most critical processes, since these resists show a strong sensitivity to post-exposure delay (PED) in vacuum during e-beam writing of about 0.5 nm/h, and in air while waiting for PEB. Further, such resists show a strong PEB temperature sensitivity of up to 8 nm/K. The multi-zone hotplate approach of the APB AFB 5500 bake system with its use prior temperature uniformity results in excellent global CD-uniformity already. However, all kinds of systematic large area effects of processes, e.g. blank coat/bake, exposure, PED, the PEB itself, etch loading, etc. may transfer in additional systematic CD-errors. Such systematic, repeatable errors can be reduced during PEB by superimposing an appropriate non-uniform temperature profile onto the regular, optimized uniform bake temperature profile, thereby compensating for such CD-non-uniformities. The required temperature profile can automatically be calculated from a suitable gobal CD measurement, determined in a typical process flow. The compensation of CD-errors resulting from vacuum PED and hotplate temperature characteristics is demonstrated here, by using automated temperature profile calculation. The global CD uniformity was improved significantly, the achieved results show a typical reduction of about 20-30%, from a total global range of about 9nm to about 6-7nm on leading-edge production photomasks.

Global CD uniformity improvement for CAR masks by adaptive post-exposure bake with CD measurement feedback

Progress towards 65nm next-generation lithography requires unprecedented global CD uniformity, with the actual ITRS 2002 roadmap proposing 4.2nm 3σ (dense lines) for 65nm binary masks. Since resolution requirements are satisfied only by using chemically amplified resists (CARs), exposure and post-exposure bake (PEB) are key processes to successful mask making, both introducing global CD errors. Develop and etch processes potentially contribute further global CD errors. The global CD uniformity can be improved significantly by adaptive PEB, especially for CARs showing moderate to strong PEB sensitivity, like NEB22. With the 25-zone hotplate of the APB5500 bake system, facilitated through a novel calibration mask with 25 equidistant temperature sensors within the resist plane, an appropriate temperature profile can be applied during PEB. This temperature profile is automatically calculated by an adaptive optimization algorithm, based on 2-dimensional spline fitting of a CD measurement. A CD-uniformity improvement (dense lines) from 3.80nm 3σ to 3.06nm 3σ (~20%) is achieved on evaluation photomasks with an 11x11 CD measurement grid.

Improvement of etching selectivity for 32-nm node mask making

As the geometry of semiconductor devices continue to scale down, high-NA imaging will be used to enhance the resolution. Sub-resolution assistant features are used to gain depth of focus at the wafer. One of the challenges in patterning small assistant features during mask fabricating is resist collapse. Reducing resist thickness is one of the solutions. This necessitates an increase in the selectivity of chromium (Cr) to photo-resist (PR). The selectivity determines the PR remaining on the mask after Cr etching. Insufficient remaining PR will induce pinhole-type clear defect and poor line edge roughness (LER). In this paper, the Cr-to-PR selectivity was studied under induced couple plasma (ICP) and quasi-remote plasma environment. PR remaining, etching bias, and critical dimension uniformity (CDU) are the main subjects for evaluation. To understand the etching behavior for higher selectivity, design of experiment (DOE) L4 by Taguchi method is used to find the dominating factors. By adopting the optimized etching recipe, the resist can be thinned down to effectively improve its collapse margin, especially for smaller assistant features. The results show that 72-nm assistant features on mask can be patterned for early 32-nm node development. This paper also suggests several approaches that can be used to reduce the required resist thickness, such as hard-mask, film thickness reduction, and etcher hardware modification.

Investigation and modeling of CPL mask profiles using OCD

Mask profile of chromeless phase-shifting lithography (CPL) defined by OCD has been investigated. In CPL masks, unbalanced bombardments caused by different ion accelerations lead to the formation of micro-notch structures. A better understanding of micro-notch structures is essential for quality gating of mask processes to improve of CPL mask profiles. By measuring 12 of 16 elements of Mueller matrix, we are able to set up a model to simulate the depth of micro-notch structure profile which shows good correlation with TEM images. Moreover, values of CD, quartz etching depth and side wall angle acquired by OCD are presented and compared with those obtained by SEM, TEM and AFM, respectively.

Characterization of charging-induced pattern positioning errors in advanced mask making

Abstract. Charging-induced pattern positioning errors (CIPPEs) from a 50-kV variable-shape e-beam writer on an opaque-MoSi-over-glass mask has been carefully characterized by directly measuring the pattern shifts using a high-accuracy mask registration tool. In addition, the reported behaviors associated with the CIPPEs, exponentially decaying in space and sign flipping with increasing pattern density (PD), another seldom-mentioned error component, behaving like a constant offset in space and becoming stronger with increasing PD, is found. The authors repeat the experiment with a charge dissipation layer coated atop the resist to experimentally explore the origins of these two phenomena and find that the exponential components, removable by the charge dissipating layer (CDL), result from the well-known resist charging effect but the constant offset, remain existing with the CDL, does not. From the result of Monte Carlo simulations, the constant component is speculated to result from blank charging. This finding can give important insights into the model-based charging effect correction as well as the effectiveness of the CDL.