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Dive into the research topics where Hsu-Liang Hsiao is active.

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Featured researches published by Hsu-Liang Hsiao.


Optics Express | 2009

Compact and passive-alignment 4-channel x 2.5-Gbps optical interconnect modules based on silicon optical benches with 45 degrees micro-reflectors.

Hsu-Liang Hsiao; Hsiao-Chin Lan; Chia-Chi Chang; Chia-Yu Lee; Siou-Ping Chen; Chih-Hung Hsu; Shuo-Fu Chang; Yo-Shen Lin; Feng-Ming Kuo; Jin-Wei Shi; Mount-Learn Wu

Compact and passive-alignment 4-channel x 2.5-Gbps optical interconnect modules are developed based on the silicon optical benches (SiOBs) of 5 x 5 mm2. A silicon-based 45 degrees micro-reflector and V-groove arrays are fabricated on the SiOB using anisotropic wet etching. Moreover, high-frequency transmission lines of 4 channel x 2.5 Gbps, and bonding pads with Au/Sn eutectic solder are also deposited on the SiOB. The vertical-cavity surface-emitting laser (VCSEL) array and photo-detector (PD) array are flip-chip assembled on the intended positions. The multi-mode fiber (MMF) ribbons are passively aligned and mounted onto the V-groove arrays. Without the assistance of additional optics, the coupling efficiencies of VCSEL-to-MMF in the transmitting part and MMF-to-PD in the receiving part can be as high as -5.65 and -1.98 dB, respectively, under an optical path of 180 microm. The 1-dB coupling tolerance of greater than +/- 20 microm is achieved for both transmitting and receiving parts. Eye patterns of both parts are demonstrated using 15-bit PRBS at 2.5 Gbps.


Optics Express | 2009

Monolithic integration of elliptic-symmetry diffractive optical element on silicon-based 45° micro-reflector

Hsiao-Chin Lan; Hsu-Liang Hsiao; Chia-Chi Chang; Chih-Hung Hsu; Chih-Ming Wang; Mount-Learn Wu

A monolithically integrated micro-optical element consisting of a diffractive optical element (DOE) and a silicon-based 45 degrees micro-reflector is experimentally demonstrated to facilitate the optical alignment of non-coplanar fiber-to-fiber coupling. The slanted 45 degrees reflector with a depth of 216 microm is fabricated on a (100) silicon wafer by anisotropic wet etching. The DOE with a diameter of 174.2 microm and a focal length of 150 microm is formed by means of dry etching. Such a compact device is suitable for the optical micro-system to deflect the incident light by 90 degrees and to focus it on the image plane simultaneously. The measured light pattern with a spot size of 15 microm has a good agreement with the simulated result of the elliptic-symmetry DOE with an off-axis design for eliminating the strongly astigmatic aberration. The coupling efficiency is enhanced over 10-folds of the case without a DOE on the 45 degrees micro-reflector. This device would facilitate the optical alignment of non-coplanar light coupling and further miniaturize the volume of microsystem.


Optics Express | 2012

Optical interconnect transmitter based on guided-wave silicon optical bench

Po-Kuan Shen; Chin-Ta Chen; Chia-Chi Chang; Hsu-Liang Hsiao; Yen-Chung Chang; Sheng-Long Li; Ho-Yen Tsai; Hsiao-Chin Lan; Yun-Chih Lee; Mount-Learn Wu

An optical interconnect transmitter based on guided-wave silicon optical bench is demonstrated. The guided-wave silicon optical bench (GW-SiOB) is developed on a silicon-on-insulator (SOI) substrate. The three-dimensional guided-wave optical paths on the silicon optical bench are realized using trapezoidal waveguides monolithically integrated with 45° micro-reflectors. Such three-dimensional guided-w ave optical paths of SiOB would simplify and shrink the intra-chip optical interconnects located on a SOI substrate. The clearly open eye patterns operated at a data rate of 5 Gbps verifies the proposed GW-SiOB is suitable for intra-chip optical interconnects.


Proceedings of SPIE | 2012

SOI-based trapezoidal waveguide with 45-degree microreflector for non-coplanar light bending

Po-Kuan Shen; Chia-Chi Chang; Chin-Ta Chen; Hsu-Liang Hsiao; Yun-Chih Lee; Mount-Learn Wu

SOI-based trapezoidal waveguide with 45° reflector for non-coplanar light bending is proposed and demonstrated. The proposed structures include 45° micro-reflector and silicon trapezoidal waveguide. Due to the SOI-based trapezoidal waveguide with 45° reflector, light wave can be coupled into silicon waveguide easily and have higher coupling efficiency. All of structures are fabricated using a single-step wet etching process. The RMS roughness of waveguide sidewall and 45° micro-reflector is about 30 nm. The coupling efficiency of proposed structure is -4.51 dB, and misalignment tolerance are 42 μm at horizontal direction and 41 μm at vertical direction. The multi-channel trapezoidal waveguide is also demonstrated. This device can transfer the light wave at the same time, and its cross talk is about -50 dB.


IEEE Photonics Technology Letters | 2015

Chip-Level Optical Interconnects Using Polymer Waveguide Integrated With Laser/PD on Silicon

Po-Kuan Shen; Chin-Ta Chen; Ruei-Hung Chen; Shu-Shuan Lin; Chia-Chi Chang; Hsu-Liang Hsiao; Hsiao-Chin Lan; Yun-Chih Lee; Yo-Shen Lin; Mount-Learn Wu

In this letter, we demonstrate a chip-level high-speed optical interconnect, where the optical transmitter/receiver, the polymer waveguides, and the silicon-trench 45° microreflectors are integrated on a single silicon platform. The silicon platform with a silicon trench can provide independent photonic and electrical layers, respectively, for high-speed and low-speed (except high-frequency transmission lines) data transmissions. In order to demonstrate the technical capability of chip-level optical interconnects, the vertical-cavity surface-emitting laser (VCSEL)/photodetector (PD) and the driver/amplifier IC as well as the polymer waveguides combined with the 45° microreflectors are integrated on the electrical and photonic layers of the silicon platform, respectively. The total optical transmission (VCSEL-to-waveguide-to-PD via two 45° microreflectors) is -4.7 dB. The high-speed transmission experiment shows the clear eye opening up to 20-Gbit/s data rate. The bit error rate better than 10-12 for the proposed architecture is also successfully demonstrated. It reveals such chip-level optical interconnects based on the proposed silicon platform with the polymer waveguides is suitable for high-speed data transmission.


Optics Letters | 2012

SOI-based trapezoidal waveguide with 45° microreflector for noncoplanar optical interconnect

Chia-Chi Chang; Po-Kuan Shen; Chin-Ta Chen; Hsu-Liang Hsiao; Hsiao-Chin Lan; Yun-Chih Lee; Mount-Learn Wu

A silicon on insulator (SOI)-based trapezoidal waveguide with a 45° reflector for noncoplanar optical interconnect is demonstrated. The proposed waveguide is fabricated on an orientation-defined (100) SOI substrate by using a single-step anisotropic wet-etching process. The optical performances of proposed waveguides are numerically and experimentally studied. Transmittance of -4.51 dB, alignment tolerance of ±20 μm, cross talk of -53 dB, and propagation loss of -0.404 dB/cm are achieved The proposed waveguide would be a basic element and suitable for the future intrachip optical interconnects.


IEEE Photonics Technology Letters | 2013

45

Chin-Ta Chen; Po-Kuan Shen; Chia-Chi Chang; Hsu-Liang Hsiao; Jen-Yu Li; Kai Liang; Tien-Yu Huang; Ruei-Hung Chen; Guan-Fu Lu; Mount-Learn Wu

The 45°-mirror terminated polymer waveguides fabricated on a silicon substrate are demonstrated for on-chip out-of-plane optical interconnects. The silicon 45<sup>°</sup> microreflectors are fabricated on an orientation-defined (100) silicon substrate by using anisotropic chemical wet etching. On using a photolithography process, we observe two vertically bending paths at the input and output ports of polymer waveguide on a silicon substrate with 45<sup>°</sup> microreflectors. The transmission efficiency of -3.77 dB is measured for a 0.5-cm polymer waveguide combined with the 45<sup>°</sup> microreflectors. The optical loss occurring at the 45<sup>°</sup>-mirror is -0.27 dB. The channel-to-channel crosstalk for the 250-μm pitch is less than -40 dB. The wider alignment tolerance up to ±15 μm would facilitate the active-device assembly on a silicon substrate.


IEEE Photonics Journal | 2014

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Chin-Ta Chen; Po-Kuan Shen; Teng-Zhang Zhu; Chia-Chi Chang; Shu-Shuan Lin; Mao-Yuan Zeng; Chien-Yu Chiu; Hsu-Liang Hsiao; Hsiao-Chin Lan; Yun-Chih Lee; Yo-Shen Lin; Mount-Learn Wu

The chip-level 1 × 2 optical interconnects using the polymer vertical splitter developed on a silicon substrate are demonstrated. The 1 × 2 vertical-splitting configuration is realized using a polymer waveguide terminated at three silicon 45 ° reflectors. The high-frequency transmission lines combined with the indium solder bumps are developed to flip-chip assemble a vertical-cavity surface-emitting laser chip at the input port and two photodetector chips at two output ports. Total transmission loss of -3.26 dB with a splitting ratio of 1 : 1 for the proposed splitter is experimentally obtained. A 10-Gbit/s data transmission with bit error rates better than 10-12 for two output ports is achieved. It reveals that such chip-level 1 × 2 optical interconnects using the polymer vertical splitter are suitable for high-speed data transmission with multiple output ports.


IEEE Photonics Journal | 2013

-Mirror Terminated Polymer Waveguides on Silicon Substrates

Mount-Learn Wu; Chin-Ta Chen; Po-Kuan Shen; Tien-Yu Huang; Chia-Chi Chang; Hsu-Liang Hsiao; Teng-Zhang Zhu; Hsiao-Chin Lan; Yun-Chih Lee; Yo-Shen Lin

A polymer-waveguide-based optical circuit with two vertical-transition output ports for the optical interconnects is demonstrated on a silicon substrate. Such a 1 × 2 vertical splitter is realized using a polymer waveguide monolithically integrated with three silicon 45° microreflectors. The vertical-cavity surface-emitting laser chip assembled at the input port and two multimode fibers located at two output ports are arranged to demonstrate a two-port optical proximity coupling of the off-chip optical interconnects based on the proposed splitter. The optical insertion loss of -6.6 dB is experimentally obtained for the proposed 1 × 2 vertical splitter with a splitting ratio of 1.3 : 1. The clearly 10-Gb/s optical eye patterns at both output ports verify that the 1 × 2 vertical splitter is suitable for the optical interconnects with multiple output ports.


optical fiber communication conference | 2014

Chip-Level 1

Chin-Ta Chen; Po-Kuan Shen; Teng-Zhang Zhu; Chia-Chi Chang; Shu-Shuan Lin; Mao-Yuan Zeng; Chien-Yu Chiu; Hsu-Liang Hsiao; Hsiao-Chin Lan; Yun-Chih Lee; Yo-Shen Lin; Mount-Learn Wu

The chip-level 10-Gbit/s optical interconnects with the BER better than 10<sup>-12</sup> using the 1 × 2 polymer vertical splitter, which is composed of a polymer waveguide and three silicon 45° reflectors is demonstrated.

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Chia-Chi Chang

National Central University

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Hsiao-Chin Lan

National Central University

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Mount-Learn Wu

National Central University

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Chin-Ta Chen

National Central University

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Yun-Chih Lee

National Central University

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Po-Kuan Shen

National Central University

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Yo-Shen Lin

National Central University

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Bo-Kuan Shen

National Central University

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Chia-Yu Lee

National Central University

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Chih-Hung Hsu

National Central University

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