Hubert Weinberger

A 800 mW, full-rate ADSL-RT analog frontend IC with integrated line driver

An analog front-end IC with integrated line driver for an ADSL system is presented. The IC contains all analog functions including gain-controlled transmit- and receive-amplifiers, highly linear continuous-time low pass filters including on-chip automatic tuning, 14 bit ADC and DAC as well as a digitally controlled crystal oscillator. The IC has been fabricated in a mixed-signal 0.6 /spl mu/m DPTM BiCMOS technology with a chip area of 29 mm/sup 2/ and a power consumption of only 800 mW, using 3.3 V supply for all blocks except 12 V supply for the line driver.

Reusable IP Analog Circuit Design

As ‘Time to market’ plays a crucial role for successful System on Chip (SoC) business, all chip companies try to drastically reduce development cycle times. Especially in analog circuit design this is an extraordinarily challenging target. Decreasing supply voltages along with the fast introduction of new sub micron technologies and increased performance and functionality would rather suggest an increase of design efforts. But making use of IP-reuse can help a lot to achieve development cycle time reduction. A review of possible reuse methods and comments on their feasibility are presented in this paper