Hugo Veenstra
Philips
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Archive | 2008
Hugo Veenstra; John R. Long
Preface. 1. The Challenge. 1.1 Interconnect. 1.2 Device Metrics. 1.3 Cross-Connect Switches. 1.4 Transistor Operation above BVCEO. 1.5 CML circuits, PRBS generator. 1.6 Oscillators. 1.7 Outline of the book. References. 2. Interconnect Modelling, Analysis and Design. 2.1 Introduction. 2.2 Transmission Line Theory. 2.3 When to Include Transmission Line Effects. 2.4 Secondary Effects. 2.5 Resistivity-Frequency Mode Chart for a Microstrip Line. 2.6 Preferred Transmission Line Configurations. 2.7 Applying the Skin Effect Formulas to a SiGeBiCMOS Process. 2.8 Models including Skin Effect. 2.9 Signal Transfer Across a Transmission Line. 2.10 Interconnect Test Structures. 2.11 Modelling and Considerations of Digital Interconnect. 2.12 Circuit and Interconnect Design Flow. 2.13 Conclusions and Outlook. References. 3. Device Metrics. 3.1 Introduction. 3.2 Miller Effects. 3.3 Definitions based on y-Parameters. 3.4 Approximate Formulas for the Device Metrics. 3.5 Optimising a Technology for FA. 3.6 Relationship Between FA, FT and FMAX. 3.7 Trends in Device Metrics. 3.8 Other Trends. 3.9 Bipolar versus RF-CMOS. 3.10 Conclusions and Outlook. References. 4. Cross-Connect Switch Design. 4.1 Introduction. 4.2 Switch Matrix Design. 4.3 Buffer Circuits. 4.4 Complete RF Signal Path. 4.5 Supply Decoupling. 4.6 Experimental Results. 4.7 Conclusions and Outlook. 5. Bias Circuits Tolerating Output Voltages above BVCEO. 5.1 Introduction. 5.2 Principle of Collector-Base Avalanche Current. 5.3 Analysis of Simple 2-Transistor Current Mirrors. 5.4 Analysis of Current Mirrors with Internal Buffer. 5.5 Avalanche Current Compensation. 5.6 Conclusions and Outlook. 6. Design of Synchronous High Speed CML Circuits. 6.1 Introduction. 6.2 PRBS Background. 6.3 InP Technology. 6.4 PRBS Generator Design. 6.5 Experimental Results. 6.6 Distributed Capacitive Loading Reviewed. 6.7 Conclusionsand Outlook. References. 7. Analysis and Design of High Frequency LC-VCOs. 7.1 Introduction. 7.2 Input Impedance of a Cross-Coupled Differential Pair. 7.3 Input Impedance of a Capacitively-Loaded Emitter Follower. 7.4 Combining Negative Resistance and Output Buffer Functions. 7.5 LC-VCO Operating at a Frequency Close to FCROSS. 7.6 LC-VCO Operating at a Frequency Above FCROSS. 7.7 I/Q Signal Generation. 7.8 Conclusions and Outlook. References. Glossary. Appendix A. Index.
european solid-state circuits conference | 2011
Hugo Veenstra; Marc Notten; Dixian Zhao; John R. Long
A beamforming radar transmitter IC operating in the 60GHz ISM-band is presented. Three differential RF outputs interface with a 1-dimensional antenna array. Wideband signal delays are generated based on a true-time delay architecture using variable interconnect lengths to control transmit beamforming. The relative delay between RF outputs is programmable across a 16ps range with 1.2ps resolution. A biphase modulator is used to multiply the 60GHz carrier with a pseudo-random data sequence of up to 4Gb/s for UWB signal generation. The 3.4mm2 IC produces 11dBm saturated output power per RF output. The IC dissipates 1.24W from a dual 2.5V/3.5V supply voltage and is implemented in a 0.13μm SiGe BiCMOS IC process.
european microwave integrated circuit conference | 2008
Hugo Veenstra; Marc Notten
In contrast to what is generally assumed, the evolution of fT beyond the 45 nm CMOS generation may not be able to follow the ITRS roadmap. Moreover, the gap between intrinsic device and circuit performance is expected to increase with new generations, due to an increase in interconnect parasitic capacitance in the transistor pcell area. Such problems are not expected for SiGe processes. The move to higher frequencies for new applications leads to a shift in system partitioning, since the receiver front-end must be located physically close to the antenna. Emerging mm-Wave applications such as radar and high data-rate wireless need to apply beam-forming which can be realized at low cost using phased arrays. These RF requirements justify a 2-chip solution: one analog phased array front-end plus one digital SoC. RF signal distribution on chip will be a determining factor in the choice of technology. For this reason, SiGe is and will remain leading over CMOS for mm-Wave.
radio frequency integrated circuits symposium | 2007
Peng Zhao; Hugo Veenstra; John R. Long
A pulse-mode transmitter with low carrier leakage for 24 GHz short-range car radar applications is described. A 12.5 dBm output power amplifier (continuous into 50 Omega), a pulse width and rate control circuit and a voltage reference circuit are included on the IC. The pulse-mode 24GHz output signal is modulated via the final stage bias current to achieve a RF carrier leakage of -50 dBm in the off-state. The power dissipation is 360 mW when RF is on, 117 mW when RF is off, resulting in a typical 122 mW dissipation in normal operation. The 1.2 times 0.87 mm2 IC operates from a 4.5 V supply and is fabricated in 0.25 mu m SiGe:C BiCMOS technology [1].
european solid-state circuits conference | 2010
Hugo Veenstra; Mark Notten; Dixian Zhao; John R. Long
A transmitter IC for indoor presence and position detection based on radar is presented. The IC supports carrier frequencies between 45–67GHz, which includes the 60GHz ISM band. Wide RF bandwidth is achieved by applying low to moderate quality factor networks in the signal path. A bi-phase modulator multiplies the carrier with a pseudo-random data sequence of up to 4Gb/s for UWB signal generation. The 0.79mm2 IC produces >8dBm saturated output power and >25dB small-signal gain for frequencies from 35–67GHz. At 60GHz, the saturated (differential) output power is 10.7dBm. The IC dissipates 462mW from a 3.5V supply voltage and is implemented in a 0.13µm SiGe BiCMOS IC process.
radio frequency integrated circuits symposium | 2008
Hugo Veenstra; M. Notten
In this paper, two 60 GHz LC-VCOs are compared. The varactorless oscillators are identical except for the implementation of the inductors. One oscillator uses a traditional spiral inductor, the other oscillator uses a shorted transmission line as inductor. Although the spiral inductor is favorable in terms of quality factor and self-resonant frequency, the shorted transmission line offers superior isolation from the substrate. The solid ground shield of the transmission line offers reduced sensitivity to substrate interference. The 60 GHz VCO with shorted transmission line as inductor achieves a measured 22.6 dB lower power level of the main oscillator sideband for a given interference level. The experiment is performed in a BiCMOS process, but the results are also applicable to CMOS technologies.
topical meeting on silicon monolithic integrated circuits in rf systems | 2011
Marc Notten; Hugo Veenstra; Stephan Blaakmeer
A 24GHz multi-channel integer-N PLL as part of a 24GHz ISM-band wireless sensor network used for wireless commissioning of light sources (>1000) in greenhouses is presented. The PLL supports operation across five channels, each at 1Mb/s of datarate in a FSK modulated system. As power consumption is critical for battery lifetime, the synthesizer exhibits a settling time of around 10µs. The PLL contains of a 24GHz LC-VCO, programmable divider, CMOS digital PFD and loop polarity control. The innovative charge pump circuit combines rail-to-rail output range with high output impedance. The IC occupies 2mm2 and the power consumption is 21mW from a 1.8/2.5V dual supply voltage.
Archive | 2008
Hugo Veenstra; John R. Long
High-frequency sources based on LC topologies will be described in this chapter. Oscillators are needed to synchronise circuits in digital systems and as a clock source for digital signal generators such as the PRBS generator described in Chapter 6 of this book. In the clock conversion function of optical networking systems, LC oscillators are preferred due to their low jitter generation, or low phase noise when viewed in the frequency domain. RC oscillators are often used in the data and clock recovery function, because they can provide a wide tuning range and typically occupy only a small chip area. In this book, only LC oscillators are considered since these are the most attractive for high-frequency applications. As will be shown, LC oscillators can be used to generate output signals with a predictable oscillation frequency and low phase noise up to very high frequencies (e.g., even beyond fcross in bipolar circuit implementations). Many tuneable LC oscillators apply a cross-coupled differential pair to undamp the LC-tank circuit, leading to the basic configuration shown in Fig. 7.1. The maximum oscillation frequency that can be achieved with the oscillator topology of Fig. 7.1 in a given IC process depends on the active negative resistance Rx realised by the cross-coupled differential pair in relation to the shunt resistance of the tank Rt. In order to sustain oscillation, Rx must be negative and |Rx| < Rt. The cross-coupled differential pair provides a negative parallel equivalent input resistance Rx up to frequency fcross. In Chapter 3 fcross was analysed on the basis of the transistor y-parameters and evaluated for a simplified transistor model. The emitter series resistance Re was ignored in the transistor model used in Section 3.3.5. In modern SiGe and SiGe:C technologies, however, the emitter series resistance may be comparable to 1/gm when the transistor is biased at peakfT and thus plays an important role in its effective transconductance. In Section 7.2, the relationship between the input impedance of the cross-coupled differential pair and transistor parameters will be analysed for a transistor model including emitter series resistance. Expressions will be derived for the parallel equivalent input resistance Rx and capacitance Cx. The result of this analysis will indicate
Archive | 1999
Hans Voorman; Hugo Veenstra
We consider known, modified and new transistor circuits for transconductors as well as their application in integrated tunable Gm-C filters for high frequencies, that is for hundreds of MHz until more than 1 GHz. The transconductor circuits use NPN bipolar transistors and in most of the examples also vertical PNP transistors. The low delay and low input capacitance of the new circuits makes them particularly suitable for application at very high frequencies. Their high power efficiency and low noise lead to an unusually low power consumption in combination with a high signal-to-noise ratio. Their circuit simplicity yields low cost.
Archive | 2007
Edwin van der Heijden; Marc Notten; Hugo Veenstra