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Dive into the research topics where Marc Notten is active.

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Featured researches published by Marc Notten.


international microwave symposium | 2006

On-chip third-order band-pass filters for 24 and 77 GHz car radar

E. van der Heijden; Marc Notten; G. Dolmans; H. Veenstra; R. Pijper

At microwave frequencies, the use of on-chip transmission lines as a design element becomes interesting due to the small wavelengths. At car radar frequencies, 24 and 77 GHz, the inductor can be implemented by a shorted stub, which is a transmission line, shorted at one end. This paper discusses the design, simulation and measurement results of two third-order band-pass filters with a pass-band from 22-29 GHz and 66-87 GHz, respectively. Both filters use shorted stubs as inductor. The area is small and the losses are low. We demonstrate an excellent agreement between calculated and measured filter characteristics


european solid-state circuits conference | 2011

A 3-channel true-time delay transmitter for 60GHz radar-beamforming applications

Hugo Veenstra; Marc Notten; Dixian Zhao; John R. Long

A beamforming radar transmitter IC operating in the 60GHz ISM-band is presented. Three differential RF outputs interface with a 1-dimensional antenna array. Wideband signal delays are generated based on a true-time delay architecture using variable interconnect lengths to control transmit beamforming. The relative delay between RF outputs is programmable across a 16ps range with 1.2ps resolution. A biphase modulator is used to multiply the 60GHz carrier with a pseudo-random data sequence of up to 4Gb/s for UWB signal generation. The 3.4mm2 IC produces 11dBm saturated output power per RF output. The IC dissipates 1.24W from a dual 2.5V/3.5V supply voltage and is implemented in a 0.13μm SiGe BiCMOS IC process.


international microwave symposium | 2007

A SiGe-BiCMOS UWB Receiver for 24 GHz Short-Range Automotive Radar Applications

H. Veenstra; E. van der Heijden; Marc Notten; G. Dolmans

This paper presents a SiGe receiver IC for 24 GHz short-range automotive radar based on pseudo-noise code modulation. An on-chip 48 GHz LC-VCO plus frequency divider generate the 1/Q clock signals for zero-IF down-conversion. The 24 GHz output signal of the first frequency divider is available off-chip as carrier for the accompanying transmitter IC. The IC includes two LNAs with built-in single-ended to differential conversion. On-chip coplanar transmission lines on a ground shield are used extensively throughout the IC for distribution of RF and clock signals. The 1.5x1.7 mm2 receiver IC is implemented in a SiGe:C BiCMOS process with f tau/fmax = 130/140 GHz. The IC achieves a measured DSB noise figure below 7 dB across a 2.5 GHz DSB IF bandwidth, with a conversion gain of 39 dB.


european solid-state circuits conference | 2006

A 5th order 14 mWatt active polyphase filter for Analog and Digital TV on Mobile applications

Marc Notten; Hans Brekelmans; Vincent Rambeau

To be compatible with a low-IF and zero-IF output interfaces and analog and digital TV standards a reconfigurable active polyphase filter has been developed for a DVB-T/H/analog TV receiver (TV-tuner) for mobile (portable) applications. The filter with a bandwidth of 8 MHz acts as a band pass filter with a centre frequency of 5 MHz or as a low pass filter with a cut-off frequency of 4 MHz. The balanced integrator filter (active RC) is based on a 5th order elliptic (Cauer) filter and achieves a stop-band suppression of more than 60 dB and a image rejection of 50 dB. The 0.8times0.85 mm2 IC has been implemented in a 0.25 mum, 37 GHz fT BiCMOS technology and dissipates 14 mW from a 2.7V supply


european microwave integrated circuit conference | 2008

Opportunities at mm-Wave frequencies: SiGe or CMOS?

Hugo Veenstra; Marc Notten

In contrast to what is generally assumed, the evolution of fT beyond the 45 nm CMOS generation may not be able to follow the ITRS roadmap. Moreover, the gap between intrinsic device and circuit performance is expected to increase with new generations, due to an increase in interconnect parasitic capacitance in the transistor pcell area. Such problems are not expected for SiGe processes. The move to higher frequencies for new applications leads to a shift in system partitioning, since the receiver front-end must be located physically close to the antenna. Emerging mm-Wave applications such as radar and high data-rate wireless need to apply beam-forming which can be realized at low cost using phased arrays. These RF requirements justify a 2-chip solution: one analog phased array front-end plus one digital SoC. RF signal distribution on chip will be a determining factor in the choice of technology. For this reason, SiGe is and will remain leading over CMOS for mm-Wave.


international microwave symposium | 2008

Antenna and flip-chip circuit board design for a 24GHz short-range radar transceiver

Marc Notten; H. Veenstra; E. van der Heijden; G. Dolmans; F. Jansen

This paper presents the design and experimental results of a highly integrated 24GHz short-range radar transceiver. The Rx and Tx ICs are mounted by a flip-chip technique on a carrier substrate using metal bumps as interconnect. The module includes on-board Tx and Rx antennas and coplanar transmission lines on a ground shield for the distribution of the RF, LO and IF signals. The module achieves a measured DSB-NF below 9dB and a conversion gain of 38dB across a 2.5GHz DSB IF bandwidth while an I/Q matching of better than 47dB is realized. The single-ended transmit power is 0dBm at 24GHz and the power consumption of the complete system is 1100mW. The complete module size is 65×30mm.


topical meeting on silicon monolithic integrated circuits in rf systems | 2011

A 24GHz multi-channel frequency synthesizer in a 0.18µm BiCMOS technology for wireless sensor networks

Marc Notten; Hugo Veenstra; Stephan Blaakmeer

A 24GHz multi-channel integer-N PLL as part of a 24GHz ISM-band wireless sensor network used for wireless commissioning of light sources (>1000) in greenhouses is presented. The PLL supports operation across five channels, each at 1Mb/s of datarate in a FSK modulated system. As power consumption is critical for battery lifetime, the synthesizer exhibits a settling time of around 10µs. The PLL contains of a 24GHz LC-VCO, programmable divider, CMOS digital PFD and loop polarity control. The innovative charge pump circuit combines rail-to-rail output range with high output impedance. The IC occupies 2mm2 and the power consumption is 21mW from a 1.8/2.5V dual supply voltage.


Archive | 2007

RESONATOR DEVICE WITH SHORTED STUB AND MIM-CAPACITOR

Edwin van der Heijden; Marc Notten; Hugo Veenstra


Archive | 2006

Diversity antenna assembly for wireless communication equipment

Vincent Rambeau; Jan Van Sinderen; Johannes Hubertus Antonius Brekelmans; Marc Notten


Archive | 2006

Improved diversity antenna assembly for wireless communication equipment

Vincent Rambeau; Sinderen Jan Van; Johannes Hubertus Antonius Brekelmans; Marc Notten

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