Hyeong-Gon Kang

Current limiting characteristics of flux-lock type high-T/sub C/ superconducting fault current limiter with control circuit for magnetic field

A flux-lock type superconducting fault current limiter (SFCL) can change the amplitude of the magnetic field by adjusting either the inserting resistance or the phase adjusting capacitor. However, the magnetic field coil cannot generate enough magnetic field for some time after a fault happens due to resonance between the phase adjusting capacitor and the magnetic field coil. It is also required for the magnetic field generated to be controlled for the application to high-T/sub C/ superconducting (HTSC) elements which have different critical characteristics. This paper proposes a flux-lock type SFCL with a control circuit for the magnetic field, which is composed of solid state switches connected with the magnetic field coil. A current limiting experiment of this model was carried out. We showed that the amplitude of the fault current as well as the magnetic field could be controlled by the sinusoidal pulse width modulation (SPWM) operation, one of the switching techniques for controlling the magnetic field.

A study on oxidization processes of YBaCuO superconducting thin films in atomic force microscope anodization lithography

It is essential to elucidate processing mechanism in the fabrication of nano-electronic devices in order to improve their characteristics. In this study, we systematically investigated various experimental parameters in oxidizing a thin film of YBaCuO superconductor, one of the processing steps in producing a superconducting flux flow transistor (SFFT). An area between a gate and a drain in SFFT was selectively modified by controlling the parameters such as an applied bias voltage between a conducting atomic force microscope (AFM) tip and the films, the numbers of the lithographic process on the same area, and the contact resistance between the sample holder and a sample. The height of the lithographed surface was increased with higher applied bias voltage, more numbers of the lithographic process, but was decreased by increasing the contact resistance. The analysis of the data confirmed that the height enhancement results from growth of oxide via an electrochemical reaction. Also analysis of its Raman spectra revealed that the electrical property of the oxidized area became an insulator. The peak 632 cm-1 related with the Cu?O stretching mode in the YBCO structure is disappeared or broad in a sample lithographed above 10 V, which means that the Cu?O chain is affected in superconducting structure by the AFM lithographic process.

Analysis of new bridge-type superconducting fault current limiter applying modified magnetic shielding model

Abstract To reduce the difficulty and cost for the fabrication of high- T c superconducting wire consisting of bridge-type superconducting fault current limiter (SFCL), we suggested the new bridge-type SFCL applying modified magnetic shielding model using high- T c superconducting tube. In this work, the modified magnetic shielding model has been designed that replaced the DC reactor of bridge-type SFCL. Through the circuit analysis for operational characteristics, we analyzed the fault current-limiting characteristics for the proposed SFCL, and confirmed that it can perform the same fault current-limiting operation as existing bridge-type SFCL required for high- T c superconducting wire.

Conditions of ICP for a superconducting flux flow transistor and its etching characteristics

Abstract Superconducting flux flow transistors with a micron channel (3 μm) have been fabricated based on the flux flow by the inductively coupled plasma (ICP) etching technique. For a channel of superconducting vortex flow transistor (SFFT) with the high- T c superconducting characteristic in YBaCuO, the proper ICP etching conditions were an ICP power of 700 W, r.f. power of 150 W, pressure in chamber of 5 mTorr, and mixing rate of etching gas for Ar:Cl 2 , 1:1. The sample etched by ICP produced smoother morphology than by H 3 PO 4 etchant, while it made little difference with a sample by non-aqueous etchant, Br. The transresistance of an SFFT etched by the ICP technique was below 0.1 Ω at an I bdy of 40 mA. Output resistance was below 0.2 Ω. It is expected that the transresistance can be improved by decreasing the thickness of the link and introducing the multi-link structure.

Chapter 120 - Equivalent circuit model for high-T c superconducting flux flow transistor with a dual-gate structure

Publisher Summary This chapter proposes I-V characteristic simulation using a computational method to analyze the dual-gate superconducting flux flow transistor (DGSFFT). A DGSFFT has been fabricated with the micro-scale structure from epitaxial superconducting thin films by photolithography. The simulation is performed modulation of the output voltage by varying the penetration depth as a function of the dual-gate currents. This model shows the dependence of the critical current density on the spatial distribution of an applied magnetic field induced by the dual-gate currents. The I-V characteristic equation is modified in proportion to the length, the width and thickness of the micro-scale channel, and a distance between the drain line and the gate line. When compared to the calculated and measured values, the induced voltage agrees alike in the DGSFFT with a micro-bridge in the flux creep regime. This model is suitable for prediction of theI-V characteristics of the DGSFFT with the micro-scale channel in the flux creep regime.