Seokcheol Ko

Impedance variation of a flux-lock type SFCL dependent on winding direction between coil 1 and coil 2

The flux-lock type superconducting fault current limiter (SFCL) uses the magnetic coupling between two coils connected in parallel with each other. This SFCL has the merit that both the resistance of high-T/sub C/ superconducting (HTSC) element and the limiting current capacity can be simultaneously increased through the application of magnetic field into HTSC element. However, unlike other types SFCLs, the different fault current limiting characteristics can appear according to the winding direction between the two coils. In this paper, the relation of the impedance of the flux-lock type SFCL with the resistance of HTSC element was derived from its equivalent circuit using the current and the voltage relationship between the two coils. The limiting impedances of the flux-lock type SFCL due to the winding direction through the discrete fourier transform (DFT) analysis for the voltage and the current data obtained from the fault current limiting experiments were extracted and analyzed from the point of view of the limited line current and the resistance of HTSC element.

Chapter 120 - Equivalent circuit model for high-T c superconducting flux flow transistor with a dual-gate structure

Publisher Summary This chapter proposes I-V characteristic simulation using a computational method to analyze the dual-gate superconducting flux flow transistor (DGSFFT). A DGSFFT has been fabricated with the micro-scale structure from epitaxial superconducting thin films by photolithography. The simulation is performed modulation of the output voltage by varying the penetration depth as a function of the dual-gate currents. This model shows the dependence of the critical current density on the spatial distribution of an applied magnetic field induced by the dual-gate currents. The I-V characteristic equation is modified in proportion to the length, the width and thickness of the micro-scale channel, and a distance between the drain line and the gate line. When compared to the calculated and measured values, the induced voltage agrees alike in the DGSFFT with a micro-bridge in the flux creep regime. This model is suitable for prediction of theI-V characteristics of the DGSFFT with the micro-scale channel in the flux creep regime.

Chapter 116 – Quench characteristics of high-TC superconducting tape for alternating over-current using DFT

Publisher Summary In this chapter the quench characteristics of high-Tc superconducting (HTSC) tape for alternating over-current are investigated and its quench developments using discrete fourier transform (DFT) are analyzed. Generally, the voltage-current characteristics of HTSC tape for the alternating over-current are complicated because the quench and the recovery between the superconducting state and the normal state are repeated. The analysis for the quench development of HTSC tape is needed to protect it from thermal runaway, and to keep safety operation in the power machine using HTSC tape. The numerical formulation for HTSC tapes resistance is obtained by applying DFT for the measured data. By applying its numerical formulation into circuit equation, the quench developments of HTSC tape dependent on alternating over-current can be estimated and well agreed with experimental results. It is confirmed that the resistance development of HTSC tape dependent on the amplitude of alternating over-current can be estimated by introducing its expression into the circuit equation and the similar results to the experimental ones can be obtained.