Hyotaek Shim

An adaptive partitioning scheme for DRAM-based cache in Solid State Drives

Recently, NAND flash-based Solid State Drives (SSDs) have been rapidly adopted in laptops, desktops, and server storage systems because their performance is superior to that of traditional magnetic disks. However, NAND flash memory has some limitations such as out-of-place updates, bulk erase operations, and a limited number of write operations. To alleviate these unfavorable characteristics, various techniques for improving internal software and hardware components have been devised. In particular, the internal device cache of SSDs has a significant impact on the performance. The device cache is used for two main purposes: to absorb frequent read/write requests and to store logical-to-physical address mapping information. In the device cache, we observed that the optimal ratio of the data buffering and the address mapping space changes according to workload characteristics. To achieve optimal performance in SSDs, the device cache should be appropriately partitioned between the two main purposes. In this paper, we propose an adaptive partitioning scheme, which is based on a ghost caching mechanism, to adaptively tune the ratio of the buffering and the mapping space in the device cache according to the workload characteristics. The simulation results demonstrate that the performance of the proposed scheme approximates the best performance.

A buffer replacement algorithm exploiting multi-chip parallelism in solid state disks

Solid State Disks (SSDs) are superior to magnetic disks from a performance point of view due to the favorable features of NAND flash memory. Furthermore, thanks to improvement on flash memory density and adopting a multi-chip architecture, SSDs replace magnetic disks rapidly. Most previous studies have been conducted for enhancing the performance of SSDs, but these studies have been worked on the assumption that the operation unit of a host interface is the same as the operation unit of NAND flash memory, where it is needless to give consideration to partially-filled pages. In this paper, we analyze the overhead caused by the partially-filled pages, and propose a buffer replacement algorithm exploiting multi-chip parallelism to enhance the write performance. Our simulation results show that the proposed algorithm improves the write performance by up to 30% over existing approaches.

FlashLight: A Lightweight Flash File System for Embedded Systems

A very promising approach for using NAND flash memory as a storage medium is a flash file system. In order to design a higher-performance flash file system, two issues should be considered carefully. One issue is the design of an efficient index structure that contains the locations of both files and data in the flash memory. For large-capacity storage, the index structure must be stored in the flash memory to realize low memory consumption; however, this may degrade the system performance. The other issue is the design of a novel garbage collection (GC) scheme that reclaims obsolete pages. This scheme can induce considerable additional read and write operations while identifying and migrating valid pages. In this article, we present a novel flash file system that has the following features: (i) a lightweight index structure that introduces the hybrid indexing scheme and intra-inode index logging, and (ii) an efficient GC scheme that adopts a dirty list with an on-demand GC approach as well as fine-grained data separation and erase-unit data allocation. We implemented FlashLight in a Linux OS with kernel version 2.6.21 on an embedded device. The experimental results obtained using several benchmark programs confirm that FlashLight improves the performance by up to 27.4% over UBIFS by alleviating index management and GC overheads by up to 33.8%.

BEST: Best-effort energy saving techniques for NAND flash-based hybrid storage

The NAND flash-based hybrid storage that consists of a hard disk and flash cache has been widely used in mobile PCs, such as laptop/desktop computers, that require large storage capacity, energy efficiency, and better performance. In particular, in such consumer devices, energy saving is a major concern under limited battery capacity. Although a disk can be spun down during idle time for energy saving, it has been observed that there are frequent read and write requests generated by background applications, even while there is no user activity. In the hybrid storage, the flash cache is used for reducing disk activities and prolonging disk spin-down time. During the spin-down time, write requests can be temporarily stored in the flash cache, whereas read requests should be carefully handled to avoid frequent disk spin-ups. This paper presents Best-effort Energy Saving Techniques (BEST) that make the best use of the hybrid storage to provide low energy consumption, even under many background applications. In addition, the proposed techniques ensure the lifetime of the hybrid storage by considering the limited block erase and load/unload cycles of the flash memory and hard disk, respectively. Evaluation results demonstrate that the proposed techniques achieve considerable energy saving under various workloads, compared with previous studies.

Co-optimization of buffer layer and FTL in high-performance flash-based storage systems

NAND flash-based storage devices have rapidly improved their position in the secondary storage market ranging from mobile embedded systems to personal computer and enterprise storage systems. Recently, the most important issue of NAND flash-based storage systems is the performance of random writes as well as sequential writes, which strongly depends on their two main software layers: a Buffer Management Layer (BML) and a Flash Translation Layer (FTL). The primary goal of our study is to highly improve the overall performance of NAND flash-based storage systems by exploiting the cooperation between those two layers. In this paper, we propose an FTL-aware BML policy called Selective Block Padding and a BML-based FTL algorithm called Optimized Switch Merge, which overcome the limitations of existing approaches on performance enhancement. When using both the proposed techniques, evaluation results show that the throughput is significantly increased over that of previous studies.

PHash: A memory-efficient, high-performance key-value store for large-scale data-intensive applications

Abstract Large-scale data-intensive web services are evolving faster than ever, accelerating global growth in data usage and traffic at a rapid rate. This rapid growth is demanding the expansion of high-cost data infrastructures, which also underscores the industry’s need for cost-effective, high-performance distributed key-value stores. Designing key-value stores often involves a trade-off between performance and memory usage. For example, many previous studies focusing on minimizing the memory usage have developed on-disk indexing schemes, leading to lower performance. An alternative design based on in-memory indexing allows better performance, but at the expense of greater memory usage. This paper proposes a novel key-value store called PHash (Packed Hash) based on an advanced design of index and data structures that ensures both high performance and small memory usage. These advantages make the proposed scheme a better fit for processing demanding workloads in large-scale data-intensive applications. Compared to the best-performing competitor, FAWN-DS, the proposed scheme significantly reduces the memory consumption (bytes per key-value) by 83% and improves the GET throughput by up to 27.3% while the PUT throughput decreases by 12.6%. In particular, the GET performance of the proposed scheme reaches up to 99.4% of the optimal performance of the raw SSD (Solid State Drive).

Efficient Metadata Management for Flash File Systems

NAND flash memory becomes one of the most popular storage for portable embedded systems. Although many flash-aware file systems, such as JFFS2 and YAFFS2, were proposed, the large memory consumption and the long mount delay have been serious obstacles for large-capacity NAND flash memory. In this paper, we present a new flash-aware file system called DFFS (direct flash file system) which fetches only the needed metadata on demand from flash memory. In addition, DFFS employs two novel metadata management schemes, inode embedding scheme and hybrid inode indexing scheme, to improve the performance of metadata operations. Comprehensive evaluation results using microbench- mark, postmark, and Linux kernel compilation trace, show that DFFS has comparable performance to JFFS2 and YAFFS2, while achieving a small memory footprint and instant mount time.

System-Wide Cooperative Optimization for NAND Flash-Based Mobile Systems

NAND flash memory has become an essential storage medium for various mobile devices, but it has some idiosyncrasies, such as out-of-place updates and bulk erase operations, which impair the I/O performance of those devices. In particular, the random write performance is strongly influenced by the overhead of a Flash Translation Layer (FTL) that hides the idiosyncrasies of NAND flash memory. To reduce the FTL overhead, operating systems need to be adapted for FTL, but widely used mobile operating systems still mainly adopt algorithms designed for traditional hard disk drives. Although there have been recent studies on rearranging write patterns into a sequential form in the operating system, these approaches fail to produce sequential write patterns under complicated workloads, and FTL still suffers from significant garbage collection overhead. If the operating system can be made aware of the write patterns that FTL requires, the overhead can be alleviated even under random write workloads. In this paper, we propose a system-wide cooperative optimization scheme, where the operating system communicates with the underlying FTL and generates write patterns that FTL can exploit to reduce the overhead. The proposed scheme was implemented on a real mobile device, and the experimental results show that the proposed scheme constantly improves performance under diverse workloads.

RMA: A Read Miss-Based Spin-Down Algorithm using an NV Cache

It is an important issue to reduce the power consumption of a hard disk that takes a large amount of computer systempsilas power. As a new trend, an NV cache is used to make a disk spin down longer by servicing read/write requests instead of the disk. During the spin-down periods, write requests can be simply handled by write buffering, but read requests are still the main cause of initiating spin-ups because of a low hit ratio in the NV cache. Even when there is no user activity, read requests can be frequently generated by running applications and system services, hindering the spin-down. In this paper, we propose new NV cache policies: active write caching to reduce or to delay spin-ups caused by read misses during spin-down periods and a read miss-based spin-down algorithm to extend the spin-down periods, exploiting the NV cache effectively. Our policies reduce the power consumption of a hard disk by up to 50.1% with a 512 MB NV cache, compared with preceding approaches.

An energy-efficient data cache with byte-repeat pattern encoding

The on-chip cache is a significant source of the energy consumption of todays processors. Several data compression techniques including Frequent Value Caches are proposed to reduce the energy consumption in the data cache memories. However, the preceding approach has some problems, such as the monitoring time to find the frequent values dedicated for each program and the additional registers to store the frequent values. By studying the behavior of MiBench and MediaBench programs, we observed that many data values stored in the data cache have a few word patterns in which one byte is repeated and/or the rest of bytes are all zeros. These values can be represented with one byte and the pattern type bits. We propose a new energy-efficient data cache, the Byte-Repeat Pattern Cache, which employs this encoding scheme.