Hyoung-Woo Kim

Expert system-aided service restoration in distribution automation

The authors deal with service restoration following a fault on a feeder. A justification of the expert system approach is given and an efficient restoration strategy yielding minimal switching operations and constraint checking is proposed. The suggested strategy has been implemented. A rule-based expert system for service restoration has been developed using PROLOG and C. It has the capability of identifying the necessary switches for fault isolation, deciding whether the tripped circuit breaker can be reclosed, and generating the appropriate switching sequences. The system has shown satisfactory performance in various operating situations on real systems.<<ETX>>

Design of the Driver IC for 500 V Half-bridge Converter using Single Ended Level Shifter with Large Noise Immunity

In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1 BCD process parameter.

Design of a Robust Half-bridge Driver IC to a Variation of Process and Power Supply

In this paper, we propose a novel shoot-through protection circuit and pulse generator for half-bridge driver IC. We designed a robust half-bridge driver IC over a variation of processes and power supplies. The proposed circuit is composed a delay circuit using a beta-multiplier reference. The proposed circuit has a lower variation rate of dead time and pulse-width over variation of processes and supply voltages than the conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also, the proposed pulse generator is prevented from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, respectively. The variation ratio is 68%(170 ns) of maximum over variation of processes and supply voltages. The proposed circuit is designed using 1 μm 650 V BCD (Bipolar, CMOS, DMOS) process parameter, and the simulations are carried out using Spectre simulator of Cadence corporation.

Design of PWM IC with Standby Mode Control Function for SMPS

In this paper, we designed the off-line PWM(Pulse width modulation) control IC for flyback type power converter to reduce the standby power consumption. In normal state, this off-line PWM IC generates the output pulse with frequency and duty ratio of . When SMPS operates in standby mode, this IC generates the output pulse with 33kHz frequency and duty ratio of 1 %. SPICE simulation was performed to verify the standby power consumption of the power converter with designed of-line PWM IC. Power converter with designed off-line PWM IC consumes less than 0.3W when it operates in standby mode condition.

The Aging Diagnostic Technology for Predicting Lifetime of Thyristor Devices

The accelerated aging test equipment which is possible to apply voltage and temperature at the same time, is fabricated to predict lifetime of high capacity thyristor in short time. The variations of the forward/reverse breakdown voltage and the leakage current are investigated as an aging diagnostic tool. Lifetimes of the devices which are predicted from the reverse breakdown voltage with an accelerated aging time, have shown 3-15 years.

Study on the Electrical Characteristics of the Multi-RESURF SOI LDMOSFET as a Function of Epi-layer Concentration

In this paper, we analyzed the breakdown voltage and on-resistance of the multi-RESURF SOI LDMOSFET as a function of epi-layer concentration. P-/n-epi layer thickness and doping concentration of the proposed structure are varied from to find optimum breakdown voltage and on-resistance of the proposed structure. The maximum breakdown voltage of the proposed structure is

A resonant half bridge driver with novel common mode rejection technique implemented in 1.0µm high voltage (650V) DIMOS process

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