Kil-Soo Seo

Fabrication and Characterization of 4H-SiC pn Diode with Field Limiting Ring

4H-SiC pn diodes with field limiting rings(FLRs) were fabricated and characterized. The dependences of reverse breakdown voltage on the number of FLRs, the distance between p-base main junction and first FLR, and activation temperatures, were investigated. Al and B ions were implanted and activated at high temperature to form p-base and p+ region in the n-epilayer, respectively. We have obtained up to 1790V of reverse breakdown voltage in the pn diode with two FLRs on 10μm thick epilayer. The differential on-resistances of the fabricated diode are 5.3mΩcm at 100A/cm and 2.7mΩcm at 1kA/cm, respectively. All pn diodes with FLRs have higher avalanche breakdown voltages than those without an FLR. This study reveals that the FLR edge termination techniques for SiC pn diodes can provide high blocking voltage as well as low on-resistance.

Damage Relaxation Pre-Activation Anneal in Al-Implanted SiC

The effect of pre-activation annealing on the final surface morphology f the Al implanted 4H-SiC has been investigated using atomic force microscopy (AFM). The implanted SiC was annealed in dual steps; the pre-activation annealing which was done at 1100~1500 C earlier, and the activation one subsequently done at 1600 C. The implanted SiC showed the well-developed macrosteps after the activation annealing, while the unimplanted ones showed smoother surfaces. The pre-activation annealing at 1400 C was very effective to reduce the macrostep formation during the activation annealing. The surface damage induced from the ion implantation ha s been relaxed during the pre-activation annealing, which seemed to suppress the macrostep f ormation on the surface of SiC.

Multi-string AC-powered LED driver with current regulation reduction based on simple circuitry

In this letter, a new simple circuitry LED driver with current reduction is proposed, realized and experimentally validated. The proposed circuit comprises with very few components intended for making a costeffective and compact design while still shows a high performance. The circuit reduces non-conducting time of LEDs to enhance power factor (PF) and total harmonic distortion (THD). The flicker can also be relatively reduced. By using current limiter cells, lighting variation is eliminated with respect of the variation of AC input voltage. Aworst case of a 4W with only two LED-strings driver is implemented and tested by using a 1 um 650VBCDMOS high voltage process to verify advantageous characteristics of the suggested scheme. Experimental results demonstrate a PF of 0.97 with a THD of 24.62% and an efficiency of 87.1% at a 220V AC supply.

A novel on-chip step-dimmer for low cost AC-powered HV-LED driver

This letter proposes a novel on-chip step-dimmer using an analog dimming method for a high PF AC-powered LED driver. The full AC LED driver can achieve a very high PF and a low THD by using a self-adaptive power processing circuit while delivering a best-in-class dimming performance with the proposed step-dimmer. Under the control of the dimming signal, the dimming voltage is step-adjusted from 1.0V to 2.5V, the average LED current can be changed from 40% to 100% of the nominal LED current value. To verify the feasibility of the proposed scheme, an 8-string 4.4WAC-powered LED driver with the proposed step-dimmer was designed and simulated using a 0.35 um-700V BCD Magnachip process. The gained results verify that the proposed step-dimmer can maintain a high performance of the AC LED driver under different dimming modes with a PF and a THD around 0.998 and 6%, respectively.

Design of the Driver IC for 500 V Half-bridge Converter using Single Ended Level Shifter with Large Noise Immunity

In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1 BCD process parameter.

Development of the pulsed power system with 500 kA pulse current generation

The manufactured pulsed power system with 500 kA current is described is this paper. The closing switch, capacitor bank, control system, dc charging system and high current cable system etc. employed in this system are introduced. Especially the developed inverse pinch switch enabled the closing of the very high voltage and current.

Design of a digital controller for an LED lamp driver IC

This paper presents a digital controller with a new dimming method for LED driver core circuits. The designed circuit enables the LED driver operate without a bulky capacitor and voltage dividing resistors. The proposed digital controller circuit was designed and fabricated using the 1 μm-650 V DMOS process. The results obtained from the simulation and measurement of the chip indicate that the inductor current waveform is similar to the input voltage to gain a high power factor, because the inductor current is synchronized to the zero voltage signal as expected.

Design of a Robust Half-bridge Driver IC to a Variation of Process and Power Supply

In this paper, we propose a novel shoot-through protection circuit and pulse generator for half-bridge driver IC. We designed a robust half-bridge driver IC over a variation of processes and power supplies. The proposed circuit is composed a delay circuit using a beta-multiplier reference. The proposed circuit has a lower variation rate of dead time and pulse-width over variation of processes and supply voltages than the conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also, the proposed pulse generator is prevented from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, respectively. The variation ratio is 68%(170 ns) of maximum over variation of processes and supply voltages. The proposed circuit is designed using 1 μm 650 V BCD (Bipolar, CMOS, DMOS) process parameter, and the simulations are carried out using Spectre simulator of Cadence corporation.

Design of PWM IC with Standby Mode Control Function for SMPS

In this paper, we designed the off-line PWM(Pulse width modulation) control IC for flyback type power converter to reduce the standby power consumption. In normal state, this off-line PWM IC generates the output pulse with frequency and duty ratio of . When SMPS operates in standby mode, this IC generates the output pulse with 33kHz frequency and duty ratio of 1 %. SPICE simulation was performed to verify the standby power consumption of the power converter with designed of-line PWM IC. Power converter with designed off-line PWM IC consumes less than 0.3W when it operates in standby mode condition.

The Aging Diagnostic Technology for Predicting Lifetime of Thyristor Devices

The accelerated aging test equipment which is possible to apply voltage and temperature at the same time, is fabricated to predict lifetime of high capacity thyristor in short time. The variations of the forward/reverse breakdown voltage and the leakage current are investigated as an aging diagnostic tool. Lifetimes of the devices which are predicted from the reverse breakdown voltage with an accelerated aging time, have shown 3-15 years.