Hyung Dong Lee

Ultrathin (l10nm) Nb 2 O 5 /NbO 2 hybrid memory with both memory and selector characteristics for high density 3D vertically stackable RRAM applications

We report, for the first time, the novel concept of ultrathin (~10nm) W/NbO_x/Pt device with both threshold switching (TS) and memory switching (MS) characteristics. Excellent TS characteristics of NbO₂, such as high temperature stability (~160°C), fast switching speed (~22ns), good switching uniformity, and extreme scalability of device area (φ~10nm)/thickness (~10nm) were obtained. By oxidizing NbO₂, we can form ultrathin Nb₂O₅/NbO₂ stack layer for hybrid memory devices with both TS and MS. Without additional selector device, 1Kb cross-point hybrid memory device without SET/RESET disturbance up to 10⁶ cycles was demonstrated.

Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications

4F2 selector-less crossbar array 2Mb ReRAM test chip with 54nm technology has been successfully integrated for high cell efficiency and high density memory applications by implementing parts of decoders to row/column lines directly under the cell area. Read/write specifications for memory operation in a chip are presented by minimizing sneak current through unselected cells. The characteristics of memory cell (nonlinearity, Kw >;8, Iop <;10uA, Vop<;60;3V), TiOx/Ta2O5, are modified for its working in a chip by adopting appropriate materials for a resistor stack and spacer. Write condition in a chip makes a critical impact on read margin and read/write operation in a chip has been verified.

A One-Cycle Lock Time Slew-Rate-Controlled Output Driver

A low-power output-on-demand slew-rate-controlled output driver is presented. It has an open-loop digital scheme and a one-cycle lock time applicable to high-speed memory interfaces. The output driver maintains slew rate between 2.1V/ns and 3.6V/ns for the SSTL interface. Fabricated in a 0.18mum CMOS process, the control block of the proposed driver occupies 0.009mm2 and consumes 13.7mW at 1Gb/s. No external resistance is needed to calibrate the output resistance of the output driver.

NbO 2 -based low power and cost effective 1S1R switching for high density cross point ReRAM Application

In this paper, 5Xnm cross point cell array for the low power ReRAM operation was developed with 1S1R cell structure. Through the optimization of both TiOx/TaOx based-1R and NbO2 based-1S stacks with TiN based-electrode, the worlds first and best bipolar switching characteristics with the lowest operation current (20~50uA) and sneak current (~1uA) level were acquired.

Varistor-type bidirectional switch (J MAX >10 7 A/cm 2 , selectivity∼10 4 ) for 3D bipolar resistive memory arrays

We demonstrate a varistor-type bidirectional switch (VBS) with excellent selection property for future 3D bipolar resistive memory array. A highly non-linear VBS showed superior performances including high current density (>;3×10⁷A/cm²) and high selectivity (~10⁴). The non-linear I-V characteristics can be explained by varistor-type multi-layer tunnel barriers, which were formed by Ta incorporation into thin TiO₂. Furthermore, the 1S1R device showed excellent suppression of leakage current (>;10⁴ reduction) at 1/2V_READ, which is promising for ultra-high density resistive memory applications.