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Dive into the research topics where Hyunyoon Cho is active.

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Featured researches published by Hyunyoon Cho.


international solid-state circuits conference | 2011

A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4

Jung-Sik Kim; Chi Sung Oh; Ho-Cheol Lee; Dong-Hyuk Lee; Hyong-Ryol Hwang; Soo-Man Hwang; Byong-Wook Na; Joung-Wook Moon; Jin-Guk Kim; Hanna Park; Jang-Woo Ryu; Ki-Won Park; Sang-Kyu Kang; So-Young Kim; Ho-Young Kim; Jong-Min Bang; Hyunyoon Cho; Minsoo Jang; Cheolmin Han; Jung-Bae Lee; Kye-Hyun Kyung; Joo-Sun Choi; Young-Hyun Jun

Mobile DRAM is widely employed in portable electronic devices due to its feature of low power consumption. Recently, as the market trend renders integration of various features in one chip, mobile DRAM is required to have not only low power consumption but also high capacity and high speed. To attain these goals in mobile DRAM, we designed a 1Gb single data rate (SDR) Wide-I/O mobile SDRAM with 4 channels and 512 DQ pins, featuring 12.8GB/s data bandwidth.


British Journal of Pharmacology | 2012

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Sangsu Bang; Sungjae Yoo; Tae Jin Yang; Hyunyoon Cho; Sun Wook Hwang

BACKGROUND AND PURPOSE Transient receptor potential ion channel vanilloid 3 (TRPV3) is expressed in skin keratinocytes and plays an important role in thermal and chemical nociceptions in the periphery. The presence of TRPV3 inhibitors would improve our understanding of TRPV3 function and help to develop receptor‐specific analgesics. However, little is known about physiological substances that specifically inhibit TRPV3 activity. Here, we investigated whether 17(R)‐resolvin D1 (17R‐RvD1), a naturally occurring pro‐resolving lipid specifically affects TRPV3 activity.


Neuroscience | 2006

128 I/Os Using TSV Based Stacking

Jun-Hee Park; Hyunyoon Cho; H. Kim; K.-W. Kim

Recurrent epileptic seizures are known to provoke various forms of cellular reorganization in the brains of humans and experimental animals. However, little is known about the mechanism of neuronal cell death resulting from epileptic seizures elicited by GABA antagonists. In the present study, we explored the effect on the central nervous systems of freely moving adult rats, of repeated brief epileptic seizures induced by systemic injection of pentylenetetrazole, a GABA-A receptor antagonist. Starting with minor convulsions, repeated epileptic seizures elicited a progressive increase in seizure severity, culminating in the fully kindled state. Histological examination showed that the epileptic seizures caused overt neuronal cell death in the limbic system, including the hippocampus and amygdala, and its adjoining cortex. During the recurrent epileptic seizures, neurogenesis occurred in the subgranular zone of the hippocampus, the subventricular zone of the lateral ventricle, and the amygdala. This type of pentylenetetrazole-induced neurogenesis was seen at an early stage of epileptogenesis in some regions in which massive cell loss was not evident. This suggests that neurogenesis is not a secondary consequence of neuronal cell death, but rather an independent effect of recurrent epileptic seizures.


British Journal of Pharmacology | 2012

17(R)-resolvin D1 specifically inhibits transient receptor potential ion channel vanilloid 3 leading to peripheral antinociception

Sangsu Bang; Sungjae Yoo; Tae Jin Yang; Hyunyoon Cho; Sun Wook Hwang

BACKGROUND AND PURPOSE Sensory neuronal and epidermal transient receptor potential ion channels (TRPs) serve an important role as pain sensor molecules. While many natural and synthetic ligands for sensory TRPs have been identified, little is known about the endogenous activator for TRPV4. Recently, we reported that endogenous metabolites produced by the mevalonate pathway regulate the activities of sensory neuronal TRPs. Here, we show that dimethylallyl pyrophosphate (DMAPP), a substance produced by the same pathway is an activator of TRPV4.


international solid-state circuits conference | 2012

Repeated brief epileptic seizures by pentylenetetrazole cause neurodegeneration and promote neurogenesis in discrete brain regions of freely moving adult rats

Yong-Cheol Bae; Joon-Young Park; Sang Jae Rhee; Seung Bum Ko; Yong-Gwon Jeong; Kwang-Sook Noh; Younghoon Son; Jae-Youn Youn; Yong-Gyu Chu; Hyunyoon Cho; Mi-Jo Kim; Dae-Sik Yim; Hyo-Chang Kim; Sang-Hoon Jung; Hye-In Choi; Sung-Min Yim; Jung-Bae Lee; Joo Sun Choi; Kyung-seok Oh

Mobile DRAM is widely adopted in battery-powered portable devices because of its low power. Recently, in mobile devices such as smart phones and tablet PCs, higher performance is required to support 3D gaming mode and high-quality video. These trends lead to consideration of higher-performance DRAMs than LPDDR2, while the power budget for DRAMs for mobile devices cannot increase. DRAMs with wide I/O or serial I/O have been reviewed as candidates for over 6.4GB/s channel bandwidth. However, wide-I/O DRAMs [1] must solve issues such as stacking yield for higher density and failure analysis modeling of system-in-package (SiP), and most serial I/Os have worse I/O power efficiency than LPDDR2. For an evolutionary successor of LPDDR2, therefore, we design a 1.2V 1.6Gb/s/pin ×32 4Gb low-power DDR3 SDRAM (LPDDR3) with input skew calibration and enhanced refresh control schemes, achieving 6.4GB/s total data bandwidth. Most features of LPDDR3 are backward compatible with LPDDR2, except that channel termination, command-address (CA) training, and write leveling are adopted.


international electron devices meeting | 2007

Nociceptive and pro‐inflammatory effects of dimethylallyl pyrophosphate via TRPV4 activation

S. Kubicek; Tom Schram; V. Paraschiv; Rita Vos; Marc Demand; C. Adelmann; Thomas Witters; Laura Nyns; Lars-Ake Ragnarsson; H.Y. Yu; A. Veloso; R. Singanamalla; Thomas Kauerauf; Erika Rohr; S. Brus; C. Vrancken; V. S. Chang; R. Mitsuhashi; A. Akheyar; Hyunyoon Cho; Jacob Hooker; Barry O'Sullivan; T. Chiarella; C. Kerner; Annelies Delabie; S. Van Elshocht; K. De Meyer; S. De Gendt; P. Absil; Thomas Hoffmann

A gate-first process was used to fabricate CMOS circuits with high performing high-K and metal gate transistors. Symmetric low VT values of plusmn 0.25 V and unstrained IDSAT of 1035/500 muA/mum for nMOS/pMOS at IOFF=100nA/mum and |VDD|=1.1 V are demonstrated on a single wafer. This was achieved using Hf-based high-k dielectrics with La (nMOS) and Al (pMOS) doping, in combination with a laser-only activation anneal to maintain band-edge EWF and minimal EOT re-growth. The laser-only anneal further results in improved LG scaling of 15 nm and a 2 Aring TINV reduction over the spike reference.


symposium on vlsi technology | 2016

A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

Hyunyoon Cho; H.S. Oh; Kab-jin Nam; Young Hoon Kim; Kyoung-hwan Yeo; Wang-Hyun Kim; Yong-Seok Chung; Y.S. Nam; Sung-Min Kim; Wookhyun Kwon; M.J. Kang; Il-Goo Kim; H. Fukutome; C.W. Jeong; Hyeon-Jin Shin; Yun-Hee Kim; Dong-Wook Kim; S.H. Park; Jae-Kyeong Jeong; S.B. Kim; Dae-Won Ha; J.H. Park; Hwa-Sung Rhee; Sang-Jin Hyun; Dong-Suk Shin; D. H. Kim; Hyoung-sub Kim; Shigenobu Maeda; K.H. Lee; M.C. Kim

10nm logic technology using Si FinFET is developed for low power and high performance applications. Power-speed gain of 27% compared to 14nm technology node was obtained using four key developments: 1) advanced gate stack engineering enabling 4 multi-Vt devices, 2) 3rd generation Fin technology, 3) highly doped source/drain (S/D), and 4) contact resistance optimization. CVD liner for BEOL process was also applied for better metal fill capability. Finally yield of the smallest ever SRAM with 0.04um2 SRAM bit-cell size was demonstrated.


international electron devices meeting | 2011

Low V T CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

Hyunyoon Cho; Kang-ill Seo; Won-Cheol Jeong; Yong-Il Kim; Y.D. Lim; Won-Jun Jang; J.G. Hong; Sung-dae Suk; Ming Li; C. Ryou; Hwa Sung Rhee; J.G. Lee; Hee Sung Kang; Yang-Soo Son; C.L. Cheng; Soo-jin Hong; Wouns Yang; Seok Woo Nam; Jung-Chak Ahn; Do-Sun Lee; S.H. Park; M. Sadaaki; D.H. Cha; Dong-Wook Kim; Sang-pil Sim; S. Hyun; C.G. Koh; Byung-chan Lee; Sangjoo Lee; M.C. Kim

A 20 nm logic device technology for low power and high performance application is presented with the smallest contacted-poly pitch (CPP) of minimal 80 nm ever reported in bulk Si planar device. We have achieved nFET and pFET drive currents of 770 µA/µm and 756 µA/µm respectively at 0.9 V and 1 nA/µm Ioff with the novel high-k/metal (HKMG) gate stack and advanced strain engineering. Short channel effect is successfully suppressed thanks to the optimized shallow junction, resulting in excellent DIBL and subthreshold swing below 120 mV and 90 mV/dec, respectively. In addition, full functionality of SRAM device with 20 nm technology architecture is confirmed.


Journal of Dental Research | 2010

Si FinFET based 10nm technology with multi Vt gate stack for low power and high performance applications

Jae Jun Ryu; Sungjae Yoo; Kisoo Kim; Jong Seon Park; Sangsu Bang; Sang Hyup Lee; Tae Jin Yang; Hyunyoon Cho; Sun Wook Hwang

Er,Cr:YSGG lasers are used clinically in dentistry. The advantages of laser therapy include minimal thermal damage and the alleviation of pain. This study examined whether the Er,Cr:YSGG laser has in vivo and in vitro antinociceptive effects in itself. In capsaicin-evoked acute licking/shaking tests and Hargreaves tests, laser irradiation with an aerated water spray suppressed nociceptive behavior in mice. Laser irradiation attenuated TRPV1 activation by capsaicin in Ca2+ imaging experiments with TRPV1-overexpressing cells and cultured trigeminal neurons. Therefore, the laser-induced behavioral changes are probably due to the loss of TRPV1 activity. TRPV4 activity was also attenuated, but limited mechanical antinociception by the laser was observed. The laser failed to alter the other receptor functions, which indicates that the antinociceptive effect of the laser is dependent on TRPV1. These results suggest that the Er,Cr:YSGG laser has analgesic effects via TRPV1 inhibition. Such mechanistic approaches may help define the laser-sensitive pain modality and increase its beneficial uses.


symposium on vlsi technology | 2008

Bulk planar 20nm high-k/metal gate CMOS technology platform for low power and high performance applications

S. Kubicek; Tom Schram; Erika Rohr; V. Paraschiv; Rita Vos; Marc Demand; C. Adelmann; Thomas Witters; Laura Nyns; Annelies Delabie; Lars-Ake Ragnarsson; T. Chiarella; C. Kerner; Abdelkarim Mercha; B. Parvais; Marc Aoulaiche; C. Ortolland; H.Y. Yu; A. Veloso; Liesbeth Witters; R. Singanamalla; Thomas Kauerauf; S. Brus; C. Vrancken; Vincent S. Chang; Shou-Zen Chang; R. Mitsuhashi; Y. Okuno; A. Akheyar; Hyunyoon Cho

We discuss several advancements over our previous report (S. Kubicek, 2006): - Introduction of conventional stress boosters resulting in 16% and 11% for nMOS and pMOS respectively. For the first time the compatibility of SMT (stress memorization technique) with high-kappa/metal gate is demonstrated. In addition, we developed a blanket SMT process that does not require a photo to protect the pMOS by selecting a hydrogen-rich SiN film. - A comprehensive study of HfSiO and HfO2 as function of La/Al doping and spike/laser annealing. Parameters studied include Vt tuning, reliability and process control. - Demonstration of fast invertor delay of 10 ps including high frequency response analysis revealing the negative impact of high metal sheet resistance and parasitic metal-poly interface oxide.

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Young Hoon Son

Seoul National University

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C. Adelmann

Katholieke Universiteit Leuven

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Jung Ho Ahn

Seoul National University

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P. Absil

Katholieke Universiteit Leuven

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R. Mitsuhashi

Katholieke Universiteit Leuven

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S. Kubicek

Katholieke Universiteit Leuven

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S. Van Elshocht

Katholieke Universiteit Leuven

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Tom Schram

Katholieke Universiteit Leuven

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Yuhwan Ro

Seoul National University

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