I. Jyothi

Schottky Barrier Parameters and Interfacial Reactions of Rapidly Annealed Au/Cu Bilayer Metal Scheme on N-type InP

The influence of rapid thermal annealing effect on the electrical and structural properties of Au/Cu Schottky contacts on n-InP has been investigated by the current-voltage (I-V), capacitance-voltage (C-V), auger electron spectroscopy (AES) and the X-ray diffraction (XRD) techniques. As-deposited sample has a barrier height of 0.64 eV (I- V), 0.76 eV (C-V) which increases to 0.82 eV (I-V), 1.04 eV (C-V) after annealing at 400°C for 1min in nitrogen ambient. However, the barrier height decreases to 0.75 eV (I-V), 0.88 eV (C-V) after annealing at 600°C for 1min. Norde method is also employed to calculate the barrier heights of Au/Cu Schottky rectifiers and the values are 0.66 eV for as-deposited, 0.83 eV for 400°C and 0.76 eV for 600°C annealed contacts. These values are in good agreement with the values obtained from I-V method. From the above observations, it is clear that the Schottky barrier height increases with annealing temperatures up to 400°C. Thus, the optimum annealing temperature for the Au/Cu Schottky contact is 400 o C. Based on the AES and XRD results, the formation of indium phases at the Au/Cu/n-InP interface may be responsible for the increase in the barrier height for the contact annealed at 400°C and a corresponding decrease in leakage current. The decrease in the barrier height after annealing at 500 o C may be due to the formation of Cu-P and Au-P interfacial compounds at the interface. The AFM results showed that the surface morphology of Au/Cu Schottky contact is fairly smooth even after annealing at 500°C.

Modification of Schottky Barrier Properties of Ti/p-type InP Schottky Diode by Polyaniline (PANI) Organic Interlayer

The electrical properties of Ti/p-type InP Schottky diodes with and without polyaniline (PANI) interlayer was investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements. The barrier height of Ti/p-type InP Schottky diode with PANI interlayer was higher than that of the conventional Ti/p-type InP Schottky diode, implying that the organic interlayer influenced the space-charge region of the Ti/p-type InP Schottky junction. At higher voltages, the current transport was dominated by the trap free space-charge-limited current and trap-filled space-charge-limited current in Ti/p-type InP Schottky diode without and with PANI interlayer, respectively. The domination of trap filled space-charge-limited current in Ti/p-type InP Schottky diode with PANI interlayer could be associated with the traps originated from structural defects prevailing in organic PANI interlayer.

Modification of Schottky barrier properties of Al/p-type Si Schottky rectifiers with graphene-oxide-doped poly(3,4-ethylenedioxythiophene):poly(styrene sulfonate) interlayer

The effects of graphene-oxide (GO) doping in the poly(3,4-ethylenedioxythiophene):poly(styrene sulfonate) (PEDOT:PSS) interlayer on the electrical and chemical properties of Al/p-type Si Schottky diodes were demonstrated. GO concentrations of 0.05 and 0.1 wt. % were used in the interlayer. The barrier height of the Al/p-type Si Schottky diode with a GO-doped PEDOT:PSS interlayer was higher than that of the diode with the pristine PEDOT:PSS interlayer; ultraviolet photoelectron spectroscopy measurements indicated that this could be well correlated with variations in the hole-injection barrier between the PEDOT:PSS interlayer and Al film caused by GO doping. The addition of 0.05 wt. % GO to the PEDOT:PSS interlayer increased the PEDOT to PSS ratio, resulting in an increase in conductivity. However, the conductivity of the PEDOT:PSS doped with 0.1 wt. % GO decreased; x-ray photoelectron spectroscopy results indicated that this could be attributed to the increased insulating GO content in PEDOT:PSS. At higher...

Temperature‐dependent Schottky barrier characteristics of Cu/Au Schottky contacts to n‐InP

The electrical characteristics of Au/Cu/n‐InP Schottky diodes have been investigated by current‐voltage (I‐V) measurements in the temperature range 260–420 K in steps of 20 K. The forward I‐V characteristics are analysed on the basis of standard thermionic emission (TE) theory and the assumption of Gaussian distribution of barrier heights (BHs) due to barrier inhomogeneties that prevail at the metal‐semiconductor (M‐S) interface. The zero‐bias BH Φb0 versus 1/2 kT plot has been drawn to obtain the evidence of a Gaussian distribution of the BHs and values of Φb0 = 1.16 eV and σ0 = 159 meV for the mean BHs and zero‐bias standard deviation have been obtained from this plot.