I. Valin

The ATLAS Silicon Pixel Sensors

Prototype sensors for the ATLAS silicon pixel detector have been developed. The design of the sensors is guided by the need to operate them in the severe LHC radiation environment at up to several hundred volts while maintaining a good signal-to-noise ratio, small cell size, and minimal multiple scattering. The ability to be operated under full bias for electrical characterization prior to attachment of the readout integrated circuit electronics is also desired.

First test results Of MIMOSA-26, a fast CMOS sensor with integrated zero suppression and digitized output

The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the detection of charged particles in high energy physics. So far, full-size sensors have been prototyped only with analog readout, which limits the output rate to about 1000 frames/second. The new MIMOSA 26 sensor provides a 2.2 cm2 sensitive surface with an improved readout speed of 10,000 frames/second and data throughput compression. It incorporates pixel output discrimination for binary readout and zero suppression micro-circuits at the sensor periphery to stream only fired pixel out. The sensor is back from foundry since february 2009 and has being characterized in laboratory and in test beam. The temporal noise is measured around 13-14 e- and an operation point corresponding to an efficiency of 99.5±0.1 % for a fake rate of 10-4 per pixel can be reached at room temperature. MIMOSA 26 equips the final version of the EUDET beam telescope and prefigures the architecture of monolithic active pixel sensors (MAPS) for coming vertex detectors (STAR, CBM and ILC experiments) which have higher requirements. Developments in the architecture and technology of the sensors are ongoing and should allow to match the desired readout speed and radiation tolerance. Finally, the integration of MAPS into a micro-vertex detector is addressed. A prototype ladder equipped, on both sides, with a row of 6 MIMOSA 26-like sensors is under study, aiming for a total material budget about 0.3% X0.

A measurement of Lorentz angle and spatial resolution of radiation hard silicon pixel sensors

Silicon pixel sensors developed by the ATLAS collaboration to meet LHC requirements and to withstand hadronic irradiation to fluences of up to

CMOS monolithic active pixel sensors for minimum ionizing particle tracking using non-epitaxial silicon substrate

10^{15} n_eq/cm^{2}

Monolithic active pixel sensors with on-pixel amplification and double sampling operation

have been evaluated using a test beam facility at CERN providing a magnetic field. The Lorentz angle was measured and found to alter from 9.0 deg. before irradiation, when the detectors operated at 150 V bias at B=1.48 T, to 3.1 deg after irradiation and operating at 600 V bias at 1.01 T. In addition to the effect due to magnetic field variation, this change is explained by the variation of the electric field inside the detectors arising from the different bias conditions. The depletion depths of irradiated sensors at various bias voltages were also measured. At 600 V bias 280 micron thick sensors depleted to ~200 micron after irradiation at the design fluence of 1 10^{15} 1 MeV n_eq/cm2 and were almost fully depleted at a fluence of 0.5 * 10^{15} 1 MeV n_eq/cm2. The spatial resolution was measured for angles of incidence between 0 deg and 30 deg. The optimal value was found to be better than 5.3 micron before irradiation and 7.4 micron after irradiation.

Electrical characteristics of silicon pixel detectors

Nonepitaxial, high resistivity silicon has been used as a substrate for implementation of CMOS monolithic active pixel sensors (MAPS) designed for high precision minimum ionizing particle tracking. The readout electronics circuitry is integrated directly on top of such a substrate using a standard commercial CMOS process. In this paper, measurements of these devices using a high-energy particle beam are presented. Efficient and performing MIP tracking is demonstrated for both small (20 /spl mu/m) and large (40 /spl mu/m) pixel readout pitch. Radiation hardness that satisfies many future particle physics applications is also proven. These results show that the use of epitaxial substrate for MAPS fabrication is not mandatory, opening a much larger choice of possible CMOS processes in the future.

Optimization of Tracking Performance of CMOS Monolithic Active Pixel Sensors

Abstract Monolithic Active Pixel Sensors (MAPS) constitute a novel technique for silicon position-sensitive detectors. Their development is driven by highly demanding performances of the vertex detector foreseen at the future linear collider. This paper presents a new approach for a detector based on the MAPS principle. The pixel concept proposed is foreseen to match with signal discrimination implemented on the chip. It combines on-pixel signal amplification with double sampling operation, and provides a signal resulting from the difference between the charges collected in two consecutive time slots. The device can be fabricated in a cheap standard CMOS process, using a wafer made of a moderately doped medium. The new pixel design uses only NMOS transistors, nwell/psub and pdiff/nwell diodes and poly1-to-poly2 capacitors. It is based on a principle of switched operation circuits with 15 transistor switches close to the minimum size and 14 transistors used for the signal amplification.

Monolithic active pixel sensors with in-pixel double sampling operation and column-level discrimination

Prototype sensors for the ATLAS silicon pixel detector have been electrically characterized. The current and voltage characteristics, charge-collection efficiencies, and resolutions have been examined. Devices were fabricated on oxygenated and standard detector-grade silicon wafers. Results from prototypes which examine p-stop and standard and moderated p-spray isolation are presented for a variety of geometrical options. Some of the comparisons relate unirradiated sensors with those that have received fluences relevant to LHC operation.

Large surface X-ray pixel detector

CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive solution for high precision tracking of minimum ionizing particles. In these devices, a thin, moderately doped, undepleted silicon layer is used as the active detector volume with the readout electronics implemented on top of it. Recently, a new MAPS prototype was fabricated using the AMS 0.35 mum OPTO process, featuring a thick epitaxial layer. A systematic study of tracking performance of that prototype using high-energy particle beam is presented in this work. Noise performance, signal amplitude from minimum ionizing particles, detection efficiency, spurious hit suppression and spatial resolution are shown as a function of the readout pitch and the charge collecting diode size. A test array with a novel readout circuitry was also fabricated and tested. Each pixel circuit consists of a front-end voltage amplifier, capacitively coupled to the charge collecting diode, followed by two analog memory cells. This architecture implements an on-pixel correlated double sampling method, allowing for optimization of integration independently of full frame readout time and strongly reduces the pixel-to-pixel output signal dispersion. First measurements using this structure are also presented

Radiation tolerance of a column parallel CMOS sensor with high resistivity epitaxial layer

Monolithic Active Pixel Sensors constitute a viable alternative to Hybrid Pixel Sensors and Charge Coupled Devices for the next generation of vertex detectors. Possible application will strongly depend on a successful implementation of on-chip hit recognition and sparsification schemes. These are not a trivial task, first because of very small signal amplitudes (/spl sim/mV), originated from charge collection, which are of the same order as natural dispersions in a CMOS process, secondly because of the limitation to use only one type of transistor over the sensitive area. The paper presents a 30 /spl times/ 128 pixel prototype chip, featuring fast, column parallel signal processing. The pixel concept combines on-pixel amplification with double sampling operation. The pixel output is a differential current signal proportional to the difference between the charges collected in two consecutive time slots. The readout of the pixel is two-phase, matching signal discrimination circuitry implemented at the end of each column. The design of low-noise discriminators includes automatic compensation of offsets for individual pixels. The details of the chip design are presented. Difficulties, encountered from being the first attempt to address on-line hit recognition, are reported. Performances of the pixel and discriminator blocks, determined in separate measurements, are discussed. The essential part of the paper consists of results of first tests performed with soft X-rays from a /sup 55/Fe source.