Ian D. French

Bias dependence of instability mechanisms in amorphous silicon thin‐film transistors

We have measured the bias dependence of the threshold voltage shift in a series of amorphous silicon‐silicon nitride thin‐film transistors, where the composition of the nitride is varied. There are two distinct instability mechanisms: a slow increase in the density of metastable fast states and charge trapping in slow states. State creation dominates at low fields and charge trapping dominates at higher fields. The state creation is found to be independent of the nitride composition, whereas the charge trapping depends strongly on the nitride composition. This is taken as good evidence that state creation takes place in the hydrogenated amorphous silicon (a‐Si:H) layer, whereas the charge trapping takes place in the a‐SiN:H. The metastable states are suggested to be Si dangling bonds in the a‐Si:H, and the state creation process similar to the Staebler–Wronski effect. The confirmation of state creation in a thin‐film transistor means that states can be created simply by populating conduction‐band states i...

Relative importance of the Si-Si bond and Si-H bond for the stability of amorphous silicon thin film transistors

We investigate the mechanism for Si dangling bond defect creation in amorphous silicon thin film transistors as a result of bias stress. We show that the rate of defect creation does not depend on the total hydrogen content or the type of hydrogen bonding in the amorphous silicon. However, the rate of defect creation does show a clear correlation with the Urbach energy and the intrinsic stress in the film. These important results support a localized model for defect creation, i.e., where a Si–Si bond breaks and a nearby H atom switches to stabilize the broken bond, as opposed to models involving the long-range diffusion of hydrogen. Our experimental results demonstrate the importance of optimizing the intrinsic stress in the films to obtain maximum stability and mobility. An important implication is that a deposition process where intrinsic stress can be independently controlled, such as an ion-energy controlled deposition should be beneficial, particularly for deposition temperatures below 300 °C.

Stable microcrystalline silicon thin-film transistors produced by the layer-by-layer technique

Microcrystalline siliconthin films prepared by the layer-by-layer technique in a standard radio-frequency glow discharge reactor were used as the active layer of top-gate thin-film transistors(TFTs). Crystalline fractions above 90% were achieved for silicon films as thin as 40 nm and resulted in TFTs with smaller threshold voltages than amorphous siliconTFTs, but similar field effect mobilities of around 0.6 cm2/V s. The most striking property of these microcrystalline silicontransistors was their high electrical stability when submitted to bias-stress tests. We suggest that the excellent stability of these TFTs, prepared in a conventional plasma reactor, is due to the stability of the μc-Si:H films. These TFTs can be used in applications that require high stability for which a-Si:HTFTs cannot be used, such as multiplexed row and column drivers in flat-panel display applications, and active matrix addressing of polymer light-emitting diodes.

The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process

The fabrication and optimization of poly-Si thin-film transistors and memory devices on glass substrates at temperatures of 200/spl deg/C-400/spl deg/C is described, and the device characteristics and stability are discussed. The devices were formed using PECVD amorphous silicon, silicon dioxide, and silicon nitride films, and the crystallization of the amorphous silicon was achieved with an excimer laser. The performance of 16/spl times/16 EEPROM arrays with integrated drive circuits formed using this technology is presented.

Quality factor in a‐Si:H nip and pin diodes

We analyze the forward characteristics of a‐Si:H nip and pin diodes. At low bias, a well‐defined exponential region exists, described by a noninteger quality factor n between 1.2 and 1.7. With increasing temperature, the quality factor decreases. This behavior can be understood with a model based on electron and hole recombination in the i layer, which relates the temperature dependence of the quality factor to the distribution of localized states in the amorphous silicon. The predictions of the model are supported by numerical calculations in which the diode device equations are solved for a given distribution of localized states. The different ideality factors are due to different energy dependencies of the density of deep states in the i layer.

Dangling-bond defect state creation in microcrystalline silicon thin-film transistors

We analyze the threshold voltage shift in microcrystalline Si thin-film transistors (TFTs), in terms of a recently developed thermalization energy concept for dangling-bond defect state creation in amorphous Si TFTs. The rate of the threshold voltage shift in microcrystalline Si TFTs is much lower than in amorphous Si TFTs, but the characteristic energy for the process, which we identify as the mean energy to break a Si–Si bond, is virtually the same. This suggests that the same basic Si–Si bond breaking process is responsible for the threshold voltage shift in both cases. The lower magnitude in microcrystalline Si TFTs is due to a much lower attempt frequency for the process. We interpret the attempt frequency in amorphous and microcrystalline silicon in terms of the localization length of the electron wave function and the effect of stabilizing H atoms being located only at grain boundaries.

Amorphous Silicon Image Sensor Arrays

We have developed a technology for 2D matrix-addressed image sensors using amorphous silicon photodiodes and thin film transistors. We have built a small prototype, having 192×192 pixels with a 20μm pixel pitch, and assessed its performance. The nip photodiodes can have dark current densities of less than 10 11 A.cm -2 (up to 5V reverse bias) and peak quantum efficiencies of 88% (at 580nm). We operated the sensor in real time mode at high speed (50 Hz frame rate and 64μS line time). The image sensor has a low noise performance giving a dynamic range in excess of 10 4 . The maximum crosstalk is about 2%, which allows at least 50 grey levels. The bottom contact of the photodiode acts as a light shield from light through the substrate, which enables the sensor to be operated as an intimate contact image sensor to image a document placed directly on top of the array. In this mode, the CTF was 75% at 2 lp.mm 1 . Good quality images are demonstrated in both front projection and intimate contact imaging modes.

A defect-pool model for near-interface states in amorphous silicon thin-film transistors

Abstract We present evidence that the majority of deep states located near to the gate-insulator interface in amorphous silicon (a-Si) thin-film transistors are part of a defect pool of silicon dangling-bond states, whose density and energy position within the energy gap of the a-Si are determined by the Fermi energy during thermal equilibration. Transistors made with silicon nitride and silicon oxide gate insulators tend to have different densities-of-states distributions. We show it is possible to modify the entire energy distribution of states, by annealing the transistors with an applied gate bias. The density of states and their energy distribution re-equilibrates to the new Fermi energy position, causing the density of states to be increased or decreased in different parts of the bandgap. In particular, an oxide transistor can be made to have a density-of-states distribution similar to a nitride transistor by suitable positive-bias annealing, and a nitride transistor can be made to have a density-of...

Evidence for the defect pool concept for Si dangling bond states in a-Si:H from experiments with thin film transistors

Abstract We compare the characteristics of a-Si:H TFTs made using silicon nitride and silicon oxide gate insulators, and then determine the energy distribution of states in the amorphous silicon band -gap. We also subject the transistors to positive and negative bias-stress, which creates new states in the gap. We find the majority of intrinsic deep states occur at a higher energy for oxide transistors than for nitride transistors. We also find that the metastable states induced by positive bias-stress occur at a higher energy than those induced by negative bias-stress. The results are consistent with the defect pool model for the Si dangling bond states.

Stability of plasma deposited thin film transistors comparison of amorphous and microcrystalline silicon

Abstract We compared threshold voltage shifts in amorphous Si, microcrystalline Si and polycrystalline Si thin-film transistors (TFTs) in terms of a recently developed thermalization energy concept for a dangling-bond defect state creation in amorphous Si TFTs. The rate of the threshold voltage shift in microcrystalline Si TFTs was much lower than in amorphous Si TFTs, but the characteristic energy for the process, which we identified as the mean energy to break a Si–Si bond, was virtually the same. This suggests that the same basic Si–Si bond breaking process was responsible for the threshold voltage shift in both cases. The lower magnitude in microcrystalline Si TFTs was due to a much lower attempt frequency for the process. We interpreted the attempt frequency in amorphous and microcrystalline silicon in terms of the localization length of the electron wavefunction and the effect of stabilizing H atoms being located only at grain boundaries.