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Dive into the research topics where Ian Juso Dedic is active.

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Featured researches published by Ian Juso Dedic.


optical fiber communication conference | 2013

Digital multi-wavelength generation and real time video transmission in a coherent ultra dense WDM PON

Harald Rohde; Erich Gottwald; Pedro Alves; Carlos Oliveira; Ian Juso Dedic; Tomislav Drenski

Generation of multiple individually modulated wavelengths out of a single laser source is one of the key pre-requisites for an economical UDWDM PON. It is implemented using a 65 GS/s DAC and real time DSP.


international solid-state circuits conference | 1996

A CMOS 6 b 200 M sample/s 3 V-supply A/D converter for a PRML read channel LSI

Sanroku Tsukamoto; Ian Juso Dedic; T. Endo; K. Kikuta; K. Goto; Osamu Kobayashi

There is a strong demand for high speed ADCs for PRML read channel LSI. Most of these ADCs are fabricated with bipolar or BiCMOS, because of high-speed operation. Conventional CMOS ADCs have 100 MSample/s conversion rate and insufficient tolerance to power supply noise. These problems are overcome by interleaved auto-zeroing (IAZ) architecture and output-swing limiting comparator (OLC). The ADCs operate at 200 MSample/s in a mixed PRML read channel LSI.


international solid-state circuits conference | 1997

A 16 b 100 k sample/s 2.7 V 25 mW ADC/DSP/DAC-based analog signal processor in 0.8 /spl mu/m CMOS

Ian Juso Dedic; N.C. Amos; M.J. King; W.G. Schofield; A.K. Kemp

The 0.8/spl mu/m CMOS signal processor described combines a low-noise analog front-end and reference, 16b ADC/DAC, and 16b DSP optimized for filter applications. With 25mW typical power consumption at 100kSample/s (3mW for ADC/DAC) it can be programmed for high-order analog filtering and other signal processing functions with 80dB typical SNR.


optical fiber communication conference | 2010

56Gs/s ADC : Enabling 100GbE

Ian Juso Dedic


Archive | 1993

DC cancellation and restoration in receiving apparatus

Ian Juso Dedic; Dominic Charles Royce


IEEE Journal of Solid-state Circuits | 1996

A CMOS 6-b, 200 MSample/s, 3 V-supply A/D converter for a PRML read channel LSI

Sanroku Tsukamoto; Ian Juso Dedic; Toshiaki Endo; Kazuyoshi Kikuta; Kunihiko Goto; Osamu Kobayashi


Archive | 2007

Current switching circuitry

Ian Juso Dedic; Darren Walker


Archive | 1999

Differential switching circuitry

Ian Juso Dedic


Archive | 1997

Successive approximation type analog to digital converter with repetitive conversion cycles

Ian Juso Dedic; Andrew David Beckett


Archive | 1996

Analog to digital converter, encoder, and recorded data reproducing apparatus

Sanroku Tsukamoto; Ian Juso Dedic; Kuniyoshi Kamei; Toshiaki Endo; Masaru Sawada; Hiroko Murakami

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