Ian M. Bell

Testing mixed signal ASICs through the use of supply current monitoring

The authors investigate testing of mixed signal integrated circuits. Several approaches are proposed, most requiring careful partitioning of the analogue and digital sections. However, the use of supply current monitoring is applicable to both digital and analogue sections. Digital testing has been widely investigated, concentrating on quiescent I/sub ddq/ testing. Using pseudo-random binary test signals with supply current testing, high fault coverage of both catastrophic FET faults and gate oxide shorts in the analogue section is shown to be obtainable. Use of on-chip supply sensors has also been investigated.<<ETX>>

Generation and verification of tests for analogue circuits subject to process parameter deviations

The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evaluation is RMS AC supply current monitoring. Tests are generated and evaluated taking account of the potential fault masking effects of process spread on the faulty circuit responses. A new test effectiveness metric of probability of detection is defined and the application of the technique to an analogue multiplier circuit is presented. The fault coverage figures are therefore more meaningful than those obtained with a fixed threshold, although they appear lower.

Generation and Verification of Tests for Analog Circuits Subject to Process Parameter Deviations

The paper presents a test stimulus generation and fault simulation methodology for the detection of catastrophic faults in analog circuits. The test methodology chosen for evaluation is RMS AC supply current monitoring. Tests are generated and evaluated taking account of the potential fault masking effects of process spread on the faulty circuit responses. A new test effectiveness metric of probability of detection is defined and the application of the technique to an analog multiplier circuit is presented. The fault coverage figures are therefore more meaningful than those obtained with a fixed threshold.

Automated Model Generation Algorithm for High-Level Fault Modeling

High-level modeling for operational amplifiers (opamps) has been previously carried out successfully using models generated by published automated model generation approaches. Furthermore, high-level fault modeling (HLFM) has been shown to work reasonably well using manually designed fault models. However, no evidence shows that published automated model generation approaches based on opamps have been used in HLFM. This paper describes HLFM for analog circuits using an adaptive self-tuning algorithm called multiple model generation system using delta. The generation algorithms and simulation models were written in MATLAB and the hardware description language VHDL-AMS, respectively. The properties of these self-tuning algorithms were investigated by modeling complementary metal-oxide-semiconductor opamps, and comparing simulations using the HLFM against those of the original simulation program with integrated circuit emphasis circuit utilizing transient analysis. Results show that the models can handle both linear and nonlinear fault situations with better accuracy than previously published HLFMs.

Built-in self test of S 2 I switched current circuits

This article presents a new concept for built-in self test of switched current circuits based on S2I memory cells. From the spectrum of possible transistor defects reported in CMOS processes [1] [2], five different fault-situations were modelled and the ability to detect the various failures was studied. This was accomplished by simulating a simple switched-current integrator in which all the different failures were introduced sequentially in all transistors. The fault coverage was derived and the result shows that a powerful system for detection of transistor faults in an analogue sampled-data system can be readily realised with a minimum of additional overhead circuitry.

Mixed current/voltage observation towards effective testing of analog and mixed-signal circuits

Power supply current monitoring is a promising technique for the development of new test methodologies for analog and mixed-signal circuits. The advantages of efficiency and reduced test time have already been recognized in the digital domain. This paper shows that improved test efficiency and detection confidence are obtained when both output voltage and power supply current are observed. Results found from the simulation of two circuits are presented comparing fault detection ratios and the amplitude of faulty response deviations when observing each one of these signals.Cross-correlation between output voltage and power supply current is presented as a means to perform a single mixed current/voltage testing operation, providing at the same time increased efficiency. It allows also for simplifications on test circuitry and processing, as reductions on the sampling rates and amplitude resolutions used to acquire the signals provide the same fault coverage levels obtained using higher fidelity measurements.

Fault orientated test and fault simulation of mixed signal integrated circuits

This paper considers the implications of structural test for analog and mixed signal (analog and digital) circuits and describes fault simulation software suitable for investigating a variety of test methods. Results from simulation investigations of dynamic supply current test are presented and compared with results obtained for real circuits. In both cases the results indicate increased fault coverage and reliability benefits. The dynamic supply current monitoring equipment used to implement the hardware test is described.

Concurrent self test of switched current circuits based on the S/sup 2/I-technique

This article presents a new concept for concurrent self test of switched current circuits based on S/sup 2/I cells as basic building blocks. Six different transistor faults were modelled and the ability to detect the various fault-situations was studied. The fault detection system presented was applied to a simple switched-current integrator in which all the different faults were introduced sequentially in all transistors. The fault coverage was derived and the result shows that a powerful system for detection of transistor faults in an analogue sampled-data system can be realised with a minimum of additional overhead circuitry.

A robust approach for automated model generation

Over the last few years, automated model generation approaches have rapidly gained importance as a sustainable methodology for verification of large, complex mix-signal SoCs (system-on-chips) and SiPs (system-in-packages). In this paper a novel approach termed multiple model generation system using Delta operator (MMGSD) is developed for extracting either single-input single-output (SISO) or multiple-input single-output (MISO) macromodels from a SPICE netlist. This model generation process detects nonlinearity through variations in output error. The objective of using delta operator is to achieve transient impulse invariant transform. Examples of the application of MMGSD are presented for simple two-input systems incorporating a two-stage CMOS operational amplifier (op amp). We demonstrate the generated models are able to model various circuits with good accuracy.

A novel approach for automated model generation

Automatic approaches for macromodel generation from SPICE-level descriptions have been of great interest over the last few years for the design of large, complex mix- signal SoCs (system-on-chips) and SiPs (system-in-packages). In this paper a novel approach termed multiple model generation system (MMGS) is developed for extracting either single-input single-output (SISO) or multiple-input single-output (MISO) macromodels from a SPICE netlist. This model generation process detects nonlinearity through variations in output error. Examples of the application of MMGS are presented for simple two-input systems incorporating a two-stage CMOS operational amplifier (op amp).