Iddo Amit

Contact Doping of Silicon Wafers and Nanostructures with Phosphine Oxide Monolayers

Contact doping method for the controlled surface doping of silicon wafers and nanometer scale structures is presented. The method, monolayer contact doping (MLCD), utilizes the formation of a dopant-containing monolayer on a donor substrate that is brought to contact and annealed with the interface or structure intended for doping. A unique feature of the MLCD method is that the monolayer used for doping is formed on a separate substrate (termed donor substrate), which is distinct from the interface intended for doping (termed acceptor substrate). The doping process is controlled by anneal conditions, details of the interface, and molecular precursor used for the formation of the dopant-containing monolayer. The MLCD process does not involve formation and removal of SiO(2) capping layer, allowing utilization of surface chemistry details for tuning and simplifying the doping process. Surface contact doping of intrinsic Si wafers (i-Si) and intrinsic silicon nanowires (i-SiNWs) is demonstrated and characterized. Nanowire devices were formed using the i-SiNW channel and contact doped using the MLCD process, yielding highly doped SiNWs. Kelvin probe force microscopy (KPFM) was used to measure the longitudinal dopant distribution of the SiNWs and demonstrated highly uniform distribution in comparison with in situ doped wires. The MLCD process was studied for i-Si substrates with native oxide and H-terminated surface for three types of phosphorus-containing molecules. Sheet resistance measurements reveal the dependency of the doping process on the details of the surface chemistry used and relation to the different chemical environments of the P═O group. Characterization of the thermal decomposition of several monolayer types formed on SiO(2) nanoparticles (NPs) using TGA and XPS provides insight regarding the role of phosphorus surface chemistry at the SiO(2) interface in the overall MLCD process. The new MLCD process presented here for controlled surface doping provides a simple yet highly versatile means for achieving postgrowth doping of nanometer scale structures and interfaces.

Barrier Height Measurement of Metal Contacts to Si Nanowires Using Internal Photoemission of Hot Carriers

Barrier heights between metal contacts and silicon nanowires were measured using spectrally resolved scanning photocurrent microscopy (SPCM). Illumination of the metal-semiconductor junction with sub-bandgap photons generates a photocurrent dominated by internal photoemission of hot electrons. Analysis of the dependence of photocurrent yield on photon energy enables quantitative extraction of the barrier height. Enhanced doping near the nanowire surface, mapped quantitatively with atom probe tomography, results in a lowering of the effective barrier height. Occupied interface states produce an additional lowering that depends strongly on diameter. The doping and diameter dependencies are explained quantitatively with finite element modeling. The combined tomography, electrical characterization, and numerical modeling approach represents a significant advance in the quantitative analysis of transport mechanisms at nanoscale interfaces that can be extended to other nanoscale devices and heterostructures.

Parallel p–n Junctions across Nanowires by One-Step Ex Situ Doping

The bottom-up synthesis of nanoscale building blocks is a versatile approach for the formation of a vast array of materials with controlled structures and compositions. This approach is one of the main driving forces for the immense progress in materials science and nanotechnology witnessed over the past few decades. Despite the overwhelming advances in the bottom-up synthesis of nanoscale building blocks and the fine control of accessible compositions and structures, certain aspects are still lacking. In particular, the transformation of symmetric nanostructures to asymmetric nanostructures by highly controlled processes while preserving the modified structural orientation still poses a significant challenge. We present a one-step ex situ doping process for the transformation of undoped silicon nanowires (i-Si NWs) to p-type/n-type (p-n) parallel p-n junction configuration across NWs. The vertical p-n junctions were measured by scanning tunneling microscopy (STM) in concert with scanning tunneling spectroscopy (STS), termed STM/S, to obtain the spatial electronic properties of the junction formed across the NWs. Additionally, the parallel p-n junction configuration was characterized by off-axis electron holography in a transmission electron microscope to provide an independent verification of junction formation. The doping process was simulated to elucidate the doping mechanisms involved in the one-step p-i-n junction formation.

Tunable diameter electrostatically formed nanowire for high sensitivity gas sensing

We report on an electrostatically formed nanowire (EFN)-based sensor with tunable diameters in the range of 16 nm to 46 nm and demonstrate an EFNbased field-effect transistor as a highly sensitive and robust room temperature gas sensor. The device was carefully designed and fabricated using standard integrated processing to achieve the 16 nm EFN that can be used for sensing without any need for surface modification. The effective diameter for the EFN was determined using Kelvin probe force microscopy accompanied by threedimensional electrostatic simulations. We show that the EFN transistor is capable of detecting 100 parts per million of ethanol gas with bare SiO2.

Functionalised hexagonal-domain graphene for position-sensitive photodetectors

Graphenes unique photoresponse has been largely used in a multitude of optoelectronics applications ranging from broadband photodetectors to wave-guide modulators. In this work we extend the range of applications to position-sensitive photodetectors (PSDs) using FeCl3-intercalated hexagonal domains of graphene grown by atmospheric pressure chemical vapour deposition (APCVD). The FeCl3-based chemical functionalisation of APCVD graphene crystals is affected by the presence of wrinkles and results in a non-uniform doping of the graphene layers. This doping profile creates multiple p-p+ photoactive junctions which show a linear and bipolar photoresponse with respect to the position of a focused light spot, which is ideal for the realization of a PSD. Our study paves the way towards the fabrication of flexible and transparent PSDs that could be embedded in smart textile and wearable electronics.

Role of Charge Traps in the Performance of Atomically Thin Transistors

Transient currents in atomically thin MoTe2 field-effect transistors (FETs) are measured during cycles of pulses through the gate electrode. The curves of the transient currents are analyzed in light of a newly proposed model for charge-trapping dynamics that renders a time-dependent change in the threshold voltage as the dominant effect on the channel hysteretic behavior over emission currents from the charge traps. The proposed model is expected to be instrumental in understanding the fundamental physics that governs the performance of atomically thin FETs and is applicable to the entire class of atomically thin-based devices. Hence, the model is vital to the intelligent design of fast and highly efficient optoelectronic devices.

Density and energy distribution of interface states in the grain boundaries of polysilicon nanowire.

Wafer-scale fabrication of semiconductor nanowire devices is readily facilitated by lithography-based top-down fabrication of polysilicon nanowire (P-SiNW) arrays. However, free carrier trapping at the grain boundaries of polycrystalline materials drastically changes their properties. We present here transport measurements of P-SiNW array devices coupled with Kelvin probe force microscopy at different applied biases. By fitting the measured P-SiNW surface potential using electrostatic simulations, we extract the longitudinal dopant distribution along the nanowires as well as the density of grain boundaries interface states and their energy distribution within the band gap.

Impact of Dopant Compensation on Graded p–n Junctions in Si Nanowires

The modulation between different doping species required to produce a diode in VLS-grown nanowires (NWs) yields a complex doping profile, both axially and radially, and a gradual junction at the interface. We present a detailed analysis of the dopant distribution around the junction. By combining surface potential measurements, performed by KPFM, with finite element simulations, we show that the highly doped (5 × 10(19) cm(-3)) shell surrounding the NW can screen the junctions built in voltage at shell thickness as low as 3 nm. By comparing NWs with high and low doping contrast at the junction, we show that dopant compensation dramatically decreases the electrostatic width of the junction and results in relatively low leakage currents.

Multiple State Electrostatically Formed Nanowire Transistors

Electrostatically formed nanowire (EFN)-based transistors have been suggested in the past as gas sensing devices. These transistors are multiple gate transistors in which the source to drain conduction path is determined by the bias applied to the back gate, and two junction-side gates. If a specific bias is applied to the side gates, the conduction band electrons between them are confined to a well-defined area forming a narrow channel-the EFN. By applying a nonsymmetric bias on the side gates, the lateral position of the EFN can be controlled. We propose a novel multiple state EFN transistor (MSET) that utilizes this degree of freedom for the implementation of complete multiplexer functionality in a single device. The basic device functionality was verified through simulation of MSETs with three and four well defined conduction states. The multiplexer functionality allows a very simple implementation of binary and multiple valued logic functions.

High-Mobility and High-Optical Quality Atomically Thin WS 2

The rise of atomically thin materials has the potential to enable a paradigm shift in modern technologies by introducing multi-functional materials in the semiconductor industry. To date the growth of high quality atomically thin semiconductors (e.g. WS2) is one of the most pressing challenges to unleash the potential of these materials and the growth of mono- or bi-layers with high crystal quality is yet to see its full realization. Here, we show that the novel use of molecular precursors in the controlled synthesis of mono- and bi-layer WS2 leads to superior material quality compared to the widely used direct sulfidization of WO3-based precursors. Record high room temperature charge carrier mobility up to 52 cm2/Vs and ultra-sharp photoluminescence linewidth of just 36 meV over submillimeter areas demonstrate that the quality of this material supersedes also that of naturally occurring materials. By exploiting surface diffusion kinetics of W and S species adsorbed onto a substrate, a deterministic layer thickness control has also been achieved promoting the design of scalable synthesis routes.