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Dive into the research topics where Igor Kouznetsov is active.

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Featured researches published by Igor Kouznetsov.


international memory workshop | 2013

A scalable, low voltage, low cost SONOS memory technology for embedded NVM applications

Krishnaswamy Ramkumar; Igor Kouznetsov; Venkatraman Prabhakar; K. Shakeri; X. Yu; Y. Yang; Long Hinh; S. Lee; S. Samanta; H.M. Shih; S. Geha; P.C. Shih; C.C. Huang; H.C. Lee; S.H. Wu; J.H. Gau; Y.K. Sheu

A novel low cost, eNVM technology is presented which has the lowest program/erase voltage reported to date. It is based on the integration of a SONOS based NVM module into a foundry CMOS process with only 3 additional masks and no additional HV oxide. An optimized integration scheme ensures that the CMOS device parameters of the eNVM process are closely matched to baseline process. Even with the low 7.5V program/erase voltage, excellent reliability has been demonstrated meeting automotive data retention requirements and 100k cycle endurance on a 4.5Mbit flash memory macro.


IEEE Transactions on Nuclear Science | 2014

Impact of Total Ionizing Dose on the Data Retention of a 65 nm SONOS-Based NOR Flash

Helmut Puchner; P. Ruths; Venkatraman Prabhakar; Igor Kouznetsov; S. Geha

In this paper, the impact of total ionizing dose on the data retention behavior of a silicon-oxide-nitride-oxide-silicon-based NOR flash nonvolatile memory is studied for the first time on a deep sub-micron 65-nm complementary metal-oxide semiconductor technology node. The fundamental nonvolatile single-level cell memory element utilizes uniform Fowler-Nordheim (F-N) tunneling for both program and erase operations. The data retention behavior is investigated on a 4-Mb NOR Flash-based memory array at space-level total ionizing dose (TID) exposures up to 500 krad. Excessive TID exposure reduces the program-erase window but improves the thermal emission coefficient and, hence, improves data retention.


Archive | 2012

Memory Architecture Having Two Independently Controlled Voltage Pumps

Ryan T. Hirose; Fredrick B. Jenne; Vijay Kumar Srinivasa Raghavan; Igor Kouznetsov; Paul Fredrick Ruths; Cristinel Zonte; Bogdan I. Georgescu; Leonard Vasile Gitlan; James Paul Myers


Archive | 2008

Memory architecture having a reference current generator that provides two reference currents

Ryan T. Hirose; Fredrick B. Jenne; Vijay Srinivasaraghavan; Igor Kouznetsov; Paul Fredrick Ruths; Cristinel Zonte; Bogdan I. Georgescu; Leonard Vasile Gitlan; James Paul Myers


Archive | 2003

Method and structure for high-voltage device with self-aligned graded junctions

Igor Kouznetsov


Archive | 2014

Embedded SONOS Based Memory Cells

Krishnaswamy Ramkumar; Igor Kouznetsov; Venkatraman Prabhakar


Archive | 2015

Drain Extended MOS Transistors With Split Channel

Venkatraman Prabhakar; Igor Kouznetsov


Archive | 2014

Method to Reduce Program Disturbs in Non-Volatile Memory Cells

Ryan T. Hirose; Igor Kouznetsov; Venkatraman Prabhakar; Kaveh Shakeri; Bogdan I. Georgescu


Archive | 2015

Systems, methods, and apparatus for memory cells with common source lines

Xiaojun Yu; Venkatraman Prabhakar; Igor Kouznetsov; Long T Hinh; Bo Jin


Archive | 2014

Complementary sonos integration into cmos flow

Venkatraman Prabhakar; Krishnaswamy Ramkumar; Igor Kouznetsov

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Bo Jin

Cypress Semiconductor

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