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Dive into the research topics where Igor M. Filanovsky is active.

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Featured researches published by Igor M. Filanovsky.


IEEE Transactions on Circuits and Systems I-regular Papers | 2001

Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits

Igor M. Filanovsky; Ahmed Allam

Mutual compensation of mobility and threshold voltage temperature variations may result in a zero temperature coefficient bias point of a MOS transistor. The conditions under which this effect occurs, and stability of this bias point are investigated. Possible applications of this effect include voltage reference circuits and temperature sensors with linear dependence of voltage versus temperature. The theory is verified experimentally investigating the temperature behavior of a simple voltage reference circuit realized in 0.35 /spl mu/m CMOS process.


IEEE Transactions on Circuits and Systems I-regular Papers | 1994

CMOS Schmitt trigger design

Igor M. Filanovsky; H. Baltes

CMOS Schmitt trigger design with given circuit thresholds is described. The approach is based on studying the transient from one stable state to another when the trigger is in linear operation. The trigger is subdivided into two subcircuits; each of them is considered as a passive load for the other. This allows the relations governing the deviations of the circuit thresholds from their given values to be obtained. The trigger device sizes are thus determined by the threshold tolerances. >


international test conference | 2005

Noncontact wafer probe using wireless probe cards

Chris Sellathamby; Md. Mahbub Reja; Lin Fu; Brenda Bai; Edwin Walter Reid; Steven Slupsky; Igor M. Filanovsky; Kris Iniewski

A method for wireless, noncontact testing of semiconductor wafers is presented. The technology applies to chips with active electronics, including standard integrated circuits (ICs), which require testing at the wafer level. The technology relies on short-range, near field communications to transfer data at gigabit per second rates between the probe card and the device under test (DUT) on a wafer. The probe consists of a CMOS device with micro antenna structures and transceiver circuits. Each antenna and transceiver circuit is capable of probing one input/output (I/O) site on the DUT. Each I/O site on the DUT is connected to a single antennae and transceiver circuit, which is designed into the DUT. The antennae and transceiver circuits can be incorporated into the DUT without any impact on performance or real estate. The main advantage of noncontact wafer probing is higher reliability (less retest, no pad scrub marks), added functionality (higher test frequencies at higher pin densities), and increased throughput (higher parallelism, reduced alignment tolerance, less maintenance, and less downtime). The wireless probes interface to standard automated test equipment (ATE) while all antenna structures and electronics needed on the DUT are fully CMOS compliant


international test conference | 2007

High throughput non-contact SiP testing

Brian Moore; Chris Sellathamby; Philippe Cauvet; Herve Fleury; M. Paulson; Md. Mahbub Reja; Lin Fu; Brenda Bai; Edwin Walter Reid; Igor M. Filanovsky; Steven Slupsky

A non-contact method for parallel testing of system-in-package (SiP) assemblies is presented. This technology allows for JTAG testing of partially or fully populated SiPs in wafer form, in advance of final packaging. The technology utilizes non-contact GHz short-range, near field communications to transfer bi-directional data to SiP substrates; creating a wireless test access port or WTAP. The system is integrated with a standard probe card to deliver power and wireless signals. The wireless probes convert high frequency RF (GHz) transceiver signals to standard tester ATE logic levels and allow the use of standard probers and JTAG testers. In addition, all transceivers (DUTand probe) use antenna structures and electronics that are fully CMOS compliant. Enhancing the economics of SiP manufacture by enabling parallel non-contact testing of SiPs before packaging is a key benefit of this technology.


Archive | 2008

Analysis and Design of Quadrature Oscillators

Luis B. Oliveira; Jorge R. Fernandes; Igor M. Filanovsky; C.J.M. Verhoeven; Manuel M. Silva

The following are some features of Analysis and Design of Quadrature Oscillators make it different from the existing literature on electronic oscillators: (1) focus on quadrature oscillators with accurate quadrature and low phase-noise, required by modern communication systems; (2) a detailed comparative study of quadrature LC and RC oscillators, including cross-coupled LC quasi-sinusoidal oscillators, cross-coupled RC relaxation oscillators, a quadrature RC oscillator-mixer, and two-integrator oscillators; (3) a thorough investigation of the effect of mismatches on the phase-error and the phase-noise; (4) the conclusion that quadrature RC oscillators can be a practical alternative to LC oscillators when area and cost should be minimized (in cross-coupled RC oscillators both the quadrature-error and phase-noise are reduced, whereas in LC oscillators the coupling increases the phase-noise.


IEEE Transactions on Circuits and Systems I-regular Papers | 1992

Simple CMOS analog square-rooting and squaring circuits

Igor M. Filanovsky; H. Baltes

Two closely related CMOS circuits are described. In the first circuit, the input signal is a current, and the output is a voltage proportional to the square root of input current. In the second circuit, the input is a voltage, and the output is the current proportional to the square of the input voltage. Each circuit includes an operational amplifier and two nested transistors. One of these transistors is in pinch-off, the other in the triode region of operation. The transistor mismatch and the effect of the amplifier offset are evaluated. The experimental data are provided. >


international symposium on circuits and systems | 2002

Temperature sensor applications of diode-connected MOS transistors

Igor M. Filanovsky; Su Tam Lim

The transconductance characteristics of a MOS transistor realized in a submicron technology have the zero-temperature coefficient (ZTC) bias point. The gate-source voltage of such transistor is linearly dependent on temperature when the transistor is diode-connected and biased by a current source. The slope of the dependence is related to the bias current value, and can be positive, negative or zero. Hence, the diode-connected transistor can be used as a controllable temperature sensor. This conclusion was experimentally verified using a circuit designed for 0.18 /spl mu/m CMOS technology.


IEEE Electron Device Letters | 1987

Suppressed sidewall injection magnetotransistor with focused emitter injection and carrier double deflection

L. Ristic; H. Baltes; T. Smy; Igor M. Filanovsky

We present a new linear magnetic field sensor (MFS) made in standard CMOS technology with a sensitivity of 1.26 percent/mT (1 percent/T ≡ 0.01 T-1). The device is a dual-collector lateral magneto-transistor (LMT) with suppressed injection of the emitter sidewalls, confinement of the injection to the center bottom of the emitter-base junction, and double deflection of carriers. Desirable collector current levels can be set without major loss of sensitivity by choosing from a wide range of operating points.


Sensors and Actuators A-physical | 1992

A 3-D vertical hall magnetic-field sensor in CMOS technology☆

M. Paranjape; Igor M. Filanovsky; Lj. Ristic

Abstract A new silicon sensor capable of detecting all three components of a magnetic field is presented. The device is based on a vertical Hall structure and has been designed and fabricated in a standard 2 μm CMOS process. Furthermore, a second test structure has been implemented by introducing slight changes to the initial design in order to investigate the possibility of increasing the device sensitivity. The results show a linear response to magnetic field in the x -, y -, and z -directions for both devices.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2007

Sinusoidal and Relaxation Oscillations in Source-Coupled Multivibrators

Igor M. Filanovsky; C.J.M. Verhoeven

The paper considers the differential equation describing sinusoidal and relaxation oscillations of the source-coupled multivibrator. The transition from one form of oscillations to another, when the coupling capacitor is increasing, is explained by modifications in the shape of the central branch of the isocline of horizontal tangents on the phase plane of this differential equation. The formulas for amplitude and frequency calculations in sinusoidal operation are found. The calculations of transistor switching time and period for relaxation oscillations are provided as well. The results were verified in simulations.

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Luis B. Oliveira

Universidade Nova de Lisboa

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Jorge R. Fernandes

Instituto Superior Técnico

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C.J.M. Verhoeven

Delft University of Technology

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Nikolay T. Tchamov

Tampere University of Technology

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Jani K. Jarvenhaara

Tampere University of Technology

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