Ilker Kalyoncu

An X-Band Slow-Wave T/R Switch in 0.25-

This brief presents a fully integrated X-band transmit/receive (T/R) switch using slow-wave transmission lines for X-band phased-array radar applications. The T/R switch was fabricated in a 0.25- μm SiGe bipolar CMOS (BiCMOS) process and occupies 0.73- mm2 chip area, excluding pads. The switch is based on shunt-shunt topology and employs isolated n-channel (NMOS) transistors and slow-wave microstrip lines. Additionally, resistive body floating and dc biasing are employed to improve the power-handling capability (P1 dB) of the switch. The T/R switch resulted in a measured insertion loss of 2.1-2.9 dB and isolation of 39-42 dB from 8 to 12 GHz. The input referred P1 dB is 27.6 dBm at 10 GHz. To our knowledge, this brief presents the utilization of slow-wave transmission lines in T/R switches for the first time. Furthermore, it can simultaneously satisfy stringent isolation, insertion loss, and power-handling capability requirements for implementing a fully integrated SiGe T/R module.

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This paper presents an SPDT switch which is designed to operate at 8-12 GHz frequency range (X-Band), as a sub module of the front end circuit of a phased array radar. The switch distinguishes itself from its counterparts with its larger frequency range and higher isolation that is uniformly distributed over its bandwidth. It is fabricated using 0.25μm SiGe BiCMOS technology of IHP Microelectronics (Germany). As a new technique, shunt inductors are placed next to shunt transistors in order to improve trade-off between insertion loss and isolation. It has isolation higher than 30 dB in entire band, input referred 1dB compression point is 27.6 dBm, insertion loss is between 2.7-4.1 dB, input and output referred return losses are better than 11 dB in the frequency range of 8-12 GHz.

SiGe BiCMOS

This letter presents an X-band power detector in a 0.25-μm SiGe BiCMOS technology which utilizes a novel technique, cascode configuration with diode connected PMOS load that provides high responsivity, high dynamic range and wideband input matching for various input powers. This configuration achieves a dynamic range of 52 dB, which is the highest dynamic range for a single stage X-band power detector to the best of authors knowledge. The total chip area is 0.42 mm2, including pads. Total power consumption is 7.2 mW. Results demonstrate that such a power detector can be used for built-in digital self calibration of X-band front-end circuits.

A wideband high isolation CMOS T/R switch for X-band phased array radar systems

This paper presents a variable phase and gain amplifier (VPGA), featured in a 4-bit digitally controlled phase shifter, that enables significant phase error reduction. The functionality of the VPGA is demonstrated by utilizing it between the third and fourth bits of a digitally controlled phase shifter. The first three bits are implemented using distributed active switches based on HBTs and the fourth bit is realized in a final amplification stage based on switching between common-base (CB) and common-emitter (CE) topologies. By the use of the VPGA, RMS phase error is reduced from 22° to 11° with the cost of reduced gain (0.1-2.5dB) and increased RMS gain error (1.0-2.2dB). A total of 360° phase shift is achieved in 4bit resolution with an RMS phase error of 0.1° at 10.5GHz, and a maximum 11° phase error in 4.5GHz bandwidth. The chip area is 2.150mm×1.040mm including pads, and the VPGA consumes only 0.32mm×0.410mm area. The chip is implemented in a 0.25-źm SiGe BiCMOS process. These performance parameters are attributed to the adjustment method by the VPGA applied in this work, which enables superior performance than the-state-of-the-art utilizing similar technologies.

A High Dynamic Range Power Detector at X-Band

This paper presents the building blocks of an X-Band T/R module in a 0.25 μm SiGe BiCMOS technology for phased arrays. The T/R module consists of a T/R switch, two SPDT switches, a power amplifier, a low noise amplifier, a phase shifter and a variable gain amplifier (not presented). The T/R switch, SPDT switch and the phase shifter are implemented using CMOS transistors whereas the PA and LNA are based on SiGe HBTs. The designed T/R switch achieves minimum insertion loss of 2.1 dB, an isolation of 42 dB and has an input PldB of 27.4 dBm at 10 GHz. The SPDT switch has less than 2.2 dB loss at X-Band. The PA resulted in a small-signal gain of 25 dB and a saturated output power of 23.2 dBm with 25 % PAE. The LNA has 1.65 dB noise figure (mean) with a gain more than 19 dB at X-Band. Lastly, the phase shifter achieves simulated RMS phase and gain errors of 1°-3.5° and 0.8-1.8 dB at X-Band.