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Dive into the research topics where Imtiaz Ahmad is active.

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Featured researches published by Imtiaz Ahmad.


Microprocessors and Microsystems | 2002

Particle swarm optimization for task assignment problem

Ayed A. Salman; Imtiaz Ahmad; Sabah Al-Madani

Abstract Task assignment is one of the core steps to effectively exploit the capabilities of distributed or parallel computing systems. The task assignment problem is an NP-complete problem. In this paper, we present a new task assignment algorithm that is based on the principles of particle swarm optimization (PSO). PSO follows a collaborative population-based search, which models over the social behavior of bird flocking and fish schooling. PSO system combines local search methods (through self experience) with global search methods (through neighboring experience), attempting to balance exploration and exploitation. We discuss the adaptation and implementation of the PSO search strategy to the task assignment problem. The effectiveness of the proposed PSO-based algorithm is demonstrated by comparing it with the genetic algorithm, which is well-known population-based probabilistic heuristic, on randomly generated task interaction graphs. Simulation results indicate that PSO-based algorithm is a viable approach for the task assignment problem.


Journal of Parallel and Distributed Computing | 2002

An integrated technique for task matching and scheduling onto distributed heterogeneous computing systems

Muhammad K. Dhodhi; Imtiaz Ahmad; Anwar Yatama; Ishfaq Ahmad

This paper presents a problem-space genetic algorithm (PSGA)-based technique for efficient matching and scheduling of an application program that can be represented by a directed acyclic graph, onto a mixed-machine distributed heterogeneous computing (DHC) system. PSGA is an evolutionary technique that combines the search capability of genetic algorithms with a known fast problem-specific heuristic to provide the best-possible solution to a problem in an efficient manner as compared to other probabilistic techniques. The goal of the algorithm is to reduce the overall completion time through proper task matching, task scheduling, and inter-machine data transfer scheduling in an integrated fashion. The algorithm is based on a new evolutionary technique that embeds a known problem-specific fast heuristic into genetic algorithms (GAs). The algorithm is robust in the sense that it explores a large and complex solution space in smaller CPU time and uses less memory space as compared to traditional GAs. Consequently, the proposed technique schedules an application program with a comparable schedule length in a very short CPU time, as compared to GA-based heuristics. The paper includes a performance comparison showing the viability and effectiveness of the proposed technique through comparison with existing GA-based techniques.


parallel computing | 1996

Multiprocessor scheduling in a genetic paradigm

Imtiaz Ahmad; Muhammad K. Dhodhi

Abstract In this paper, we present a technique based on the problem-space genetic algorithm (PSGA) for the static scheduling of directed acyclic graphs onto homogeneous multiprocessor systems to reduce the response-time. The PSGA based approach combines genetic algorithms with a list scheduling heuristic to search a large solution space efficiently and effectively to find the best possible solution in an acceptable cpu time. Comparison of results with the genetic algorithm (GA) based scheduling technique for the Stanford manipulator and the Elbow manipulator examples shows a significant improvement in the response-time. We also demonstrate the effectiveness of our algorithm by comparing it with the Critical Path/Maximum Immediate Successor First (CP/MISF) list scheduling technique for randomly generated graphs. The proposed scheme offers on the average a 3.6% improvement in the response-time as compared to the CP/MISF technique for all the random graphs.


Journal of Parallel and Distributed Computing | 1999

D-ISODATA

Muhammad K. Dhodhi; John A. Saghri; Imtiaz Ahmad; Raza Ul-Mustafa

With the advent of high-speed networks and the availability of powerful high-performance workstations, network of workstations has emerged as the most cost-effective platform for computation-intensive applications. One of the major applications for the network of workstations is in the field of remote sensing, where because of the high dimensionality of data, most of the existing data exploitation procedures are computation-intensive. To test the utility of the network of workstations in the field of remote sensing we have adopted a modified version of the well-known ISODATA classification procedure which may be considered as the benchmark for all unsupervised classification algorithms. The ISODATA algorithm is an iterative method that uses Euclidean distance as the similarity measure to cluster data elements into different classes. We have designed and developed a distributed version of ISODATA algorithm (D-ISODATA) on the network of workstations under a message-passing interface environment and have obtained promising speedup. To reduce the processing load and thereby increase the throughput, the ISODATA procedure is commonly applied to only the first few principal component images derived from the original set of the multispectral images. The drawback with the principal component approach is that it is based entirely on the statistical significance of the spectra, rather than the uniqueness of the individual spectra. As, small objects and ground features would likely manifest themselves in the last principal component images, that is, eigen images, discarding them prior to classification would lead to the loss of valuable information. The significant enhancement in processing speed on the network of workstations makes it possible for us to apply our distributed algorithm D-ISODATA to the entire set of multispectral images directly, thereby preserving all the spectral signatures in the data, regardless of their statistical significance.


Concurrency and Computation: Practice and Experience | 1995

Task assignment using a problem‐space genetic algorithm

Imtiaz Ahmad; Muhammad K. Dhodhi

The task assignment problem is one of assigning tasks of a parallel program among the processors of a distributed computing system in order to reduce the job turnaround time and to increase the throughput of the system. Since the task assignment problem is known to be NP-complete except in a few special situations, satisfactory suboptimal solutions obtainable in a reasonable amount of computation time are generally sought. In the paper we introduce a technique based on the problem-space genetic algorithm (PSGA) for the static task assignment problem in both homogeneous and heterogeneous distributed computing systems to reduce the task turnaround time and to increase the throughput of the system by properly balancing the load and reducing the interprocessor communication time among processors. The PSGA based approach combines the power of genetic algorithms, a global search method, with a simple and fast problem-specific heuristic to search a large solution space efficiently and effectively to find the best possible solution in an acceptable CPU time. Experimental results on test examples from the literature show considerable improvements in both the assignment cost and the CPU times over the previous work. The proposed scheme is also applied to a digital signal processing (DSP) system consisting of 119 tasks to illustrate its balancing properties and computational advantage on a large system. The proposed scheme offers 12–30% improvement in the assignment cost as compared to the previous best known results for the DSP example.


Computers & Electrical Engineering | 2005

Hardware implementation analysis of SHA-256 and SHA-512 algorithms on FPGAs

Imtiaz Ahmad; A. Shoba Das

Hash functions are common and important cryptographic primitives, which are very critical for data integrity assurance and data origin authentication security services. Field programmable gate arrays (FPGAs) being reconfigurable, flexible and physically secure are a natural choice for implementation of hash functions in a broad range of applications with different area-performance requirements. In this paper, we explore alternative architectures for the implementation of hash algorithms of the secure hash standards SHA-256 and SHA-512 on FPGAs and study their area-performance trade-offs. As several 64-bit adders are needed in SHA-512 hash value computation, new architectures proposed in this paper implement modulo-64 addition as modulo-32, modulo-16 and modulo-8 additions with a view to reduce the chip area. Hash function SHA-512 is implemented in different FPGA families of ALTERA to compare their performance metrics such as area, memory, latency, clocking frequency and throughput to guide a designer to select the most suitable FPGA for an application. In addition, a common architecture is designed for implementing SHA-256 and SHA-512 algorithms.


Microprocessors and Microsystems | 1995

SHEMUS: synthesis of heterogeneous multiprocessor systems

Muhammad K. Dhodhi; Imtiaz Ahmad; Robert Storert

Abstract Current VLSI technology enables the implementation of a complicated system on a single chip at a low cost. Thus it has become cost effective to design special-purpose multiprocessor architectures for computationally intensive applications in signal processing, control of power systems and robotics. This paper presents a strategy, designated as SHEMUS, for the synthesis of application-specific heterogeneous multiprocessor systems to meet the various cost and performance constraints. SHEMUS combines a known fast heuristic with a standard genetic algorithm to search a large design space efficiently and effectively. The effectiveness of our technique is demonstrated by comparing it with some existing systems. The proposed strategy provides considerable improvements in the cpu times for reasonable sized problems over previous work.


Journal of Computer Networks and Communications | 2008

An efficient algorithm to find broadcast schedule in ad hoc TDMA networks

Imtiaz Ahmad; Buthaina Al-Kazemi; A. Shoba Das

The broadcast scheduling is of fundamental importance and practical concern for ad hoc network performance measures such as the communication delay and the throughput. The scheduling problem on hand involves determination of a collision-free broadcast schedule with the minimum length TDMA frame and the maximum slot utilization by efficient distribution of slots among stations. The problem is widely known as NP-complete, and diverse heuristic algorithms were reported to solve this problem recently. The intractable nature of the broadcast scheduling problem and its importance in ad hoc TDMA networks necessitates development of more efficient heuristic algorithms. In this paper, we developed a new heuristic approach which employs a tight lower bound derived from the maximal incompatibles and generates a search space from the set of maximal compatibles. The developed algorithm is very efficient and effective in conquering the intractable nature of the broadcast scheduling problem in the sense that it explores complex solution space in smaller CPU time. A comparison with existing techniques for the test examples reported in the literature shows that our algorithm achieves a collision-free broadcast with minimum frame length and the maximum slot utilization in relatively shorter time.


The Computer Journal | 2007

Analysis and Detection Of Errors In Implementation Of SHA-512 Algorithms On FPGAs

Imtiaz Ahmad; A. Shoba Das

The Secure Hash Algorithm SHA-512 is a dedicated cryptographic hash function widely considered for use in data integrity assurance and data origin authentication security services. Reconfigurable hardware devices such as Field Programmable Gate Arrays (FPGAs) offer a flexible and easily upgradeable platform for implementation of cryptographic hash functions. Owing to the iterative structure of SHA-512, even a single transient error at any stage of the hash value computation will result in large number of errors in the final hash value. Hence, detection of errors becomes a key design issue. In this paper, we present a detailed analysis of the propagation of errors to the output in the hardware implementation of SHA-512. Included in this analysis are single, transient as well as permanent faults that may appear at any stage of the hash value computation. We then propose an error detection scheme based on parity codes and hardware redundancy. We report the performance metrics such as area, memory, and throughput for the implementation of SHA-512 with error detection capability on an FPGA of ALTERA. We achieved 100% fault coverage in the case of single faults with an area overhead of 21% and with a reduced throughput of 11.6% with the error detection circuit.


Expert Systems With Applications | 2012

Broadcast scheduling in packet radio networks using Harmony Search algorithm

Imtiaz Ahmad; Mohammad Gh. Mohammad; Ayed A. Salman; Suha A. Hamdan

Packet radio networks have attracted many applications due to their flexible structure and ability to provide high-speed wireless communication between nodes distributed over a large region. Broadcast scheduling is commonly used to find a collision-free time division multiple access protocol frame that schedule transmissions for all nodes in a minimal number of timeslots with maximum number of transmissions. In this paper, we propose a Harmony Search (HS) based algorithm for the broadcast scheduling problem. The HS-based algorithm explores the search space effectively and efficiently by exploiting the search rules of randomness, experience, and variation of experience. The effectiveness and robustness of our proposed algorithm is demonstrated through solving a set of benchmark problems and comparing the results with previously proposed techniques. Experimental results show the efficiency of the proposed algorithm in terms of quality of the solutions as well as computational time.

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Mahamed G. H. Omran

Gulf University for Science and Technology

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