In Ho Kang

Effects of wet-oxidized 4H-SiC annealed in HNO3/H2O vapour

Purpose – The high density of defects mainly attributed to the presence of silicon oxycarbides, residual C clusters, Si- and C-dangling bonds at or near the SiO2/SiC interface degrades the performance of metal-oxide-semiconductor (MOS) devices. In the effort of further improving the quality and enhancement of the SiC oxides thickness, post-oxidation annealed by a combination of nitric acid (HNO3) and water (H2O) vapor technique on thermally grown wet-oxides is introduced in this work. The paper aims to discuss these issues. Design/methodology/approach – A new technique of post-oxidation annealing (POA) on wet-oxidized n-type 4H-SiC in a combination of HNO3 and H2O vapor at various heating temperatures (70°C, 90°C and 110°C) of HNO3 solution has been introduced in this work. Findings – It has been revealed that the samples annealed in HNO3 + H2O vapour ambient by various heating temperatures of HNO3 solution; particularly at 110°C is able to produce oxide with lower interface-state density and higher break...

Post Annealing Etch Process for Improved Reverse Characteristics of 4H-SiC Diode

The effects of post annealing etch process on electrical performances of a 4H-SiC Schottky diodes without any edge termination were investigated. The post etch was carried out using various dry the dry etch techniques such as Inductively Coupled Plasma (ICP) and Neutral Beam Etch (NBE) in order to eliminate suspicious surface damages occurring during a high temperature ion activation process. The leakage current of diodes treated by NBE measured at -100V was about one order lower than that of diode without post etch and a half times lower than that of diode treated by ICP without a significant degradation of forward electrical characteristics. Based on the above results, the post annealing process was adapted to a junction barrier Schottky diode with a field limiting ring. The blocking voltages of diode without post annealing etch and diodes treated by ICP and NBE were -1038V, -1125V, and -1595V, respectively.

Study of 4H-SiC Junction Barrier Schottky(JBS) Diode Using Various Junction Structures

In this paper, to verify implant effect characteristics variation by stripe type, grid type and circle type, the P+ implant patterning was studied. The result of two-dimensional simulation was controlled by adjusting the relative area of Schottky and p–n junction dimensions of the device, which is easily implemented during the device layout design. 4H-SiC JBSs with three types have been successfully fabricated and breakdown voltage in the range of 1694–2051 V has been achieved. The results of fabricated JBSs, show that the stripe type JBSs combine the best features of the P+ implant patterns.

Modification of Surface Layer during High Temperature Annealing and its Effects on the SiC Diode Characteristics

We have investigated the influence of surface modification on the electrical properties of SiC diodes. Schottky diodes (SBDs) as well as PiN diodes were fabricated on n-type SiC substrate with an epilayer, and electrically characterized before and after high temperature annealing, and after removing the surface modified layer, respectively. The devices annealed without graphite cap layer showed ohmic behavior. The surface layer was modified to a conductive layer possibly due to the preferred sublimation of Si species. In order to confirm the existence of modified surface conductive layer, diode was fabricated on the same substrate and electrically characterized after removing 30nm-thick damaged layer by ICP-RIE. The leakage current reduced dramatically, as much as 7 orders of magnitude. The PiN diodes fabricated on the damaged surface layer showed the reverse leakage current and the breakdown voltage of 50mA and 1250V, respectively. While those of the diode fabricated after removing the damaged surface layer were 200nA at the breakdown voltage of 2100V, respectively.

Formation of the Uniform Interface Ni/4H-SiC Ohmic Contact with Titanium as Barrier Layer

Nickel (Ni) is the most widely used metal for the formation of ohmic contact on n-type SiC. However, the irregular contact can potentially cause degradation in the device performance. To form the uniform ohmic interface, titanium (Ti) was applied as a barrier layer. Ni/Ti/SiC and Ti/Ni/SiC contact metal structures were prepared, and ohmic contacts were formed using a rapid thermal annealing process. The interfacial properties of both contact metal structures were enhanced by applying the Ti layer. The specific contact resistance of ohmic contacts showed a slightly lower or similar value (~ low 105 Ωcm2) compared with the specific contact resistance values formed from only the Ni contact metal.

Erratum to: Branch length similarity entropy-based descriptors for shape representation (Journal of the Korean Physical Society, (2017), 71, 10, (727-732), 10.3938/jkps.71.593)

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Impact of Stacking Fault on the I-V Characteristics of 4H-SiC Schottky Barrier Diode

The influence of stacking faults (SFs) and triangular defects (TDs) on the electrical properties of 4H-SiC Schottky barrier diode (SBD) were investigated. The SF types and locations were distinguished and mapped by using room-temperature photoluminescence (PL) and optical microscope. SBDs were fabricated including the location of SF’s and TD’s. The effects of the types of defects and its area portion in the fabricated SBDs were also investigated. Based on the present data, 3C-TD has more harmful effect rather than the other SFs. The fabricated SBDs including SFs showed that increase of area portion of SF’s also resulted increase of specific on resistance of SBDs.

Investigation of charge build-up in NO nitrided gate oxide on 4H-SiC during Fowler-Nordheim injection and fabrication of 4H-SiC Lateral Double-Implanted MOSFETs

The charge build up in gate oxide and the field effective mobility of 4H-SiC Lateral Double Implanted Metal-Oxide-Semiconductor Field-Effect Transistors (DIMOSFETs) have been evaluated for its dependence on the Post-Oxidation Annealing (POA) time in a nitric oxide gas ambient. NO nitrided oxide for 3 hours significantly reduces the interface trap density near the conduction band and effective oxide charge density, resulting in a decrease of oxide trapped charge in gate oxide during Fowler-Nordheim injection as compared with that of NO POA for 1-2 hours. A high field effect mobility of 11.8 cm2/Vs was successfully achieved in Lateral DIMOSFETs with NO POA for 3 hours. The electrical properties of metal-oxide semiconductor devices fabricated using these oxides are discussed in terms of the oxides chemical composition.

Design and Characterization of 50W Switch Mode Power Supply Using Normally-On SiC JFET

The 50W Quasi-resonant mode SMPS which adopted a normally-on-type SiC JFET as a switch has been designed and characterized. A simple decision circuit and an auxiliary power supply was utilized to safely protect the JFET from an in-rush current at initial operation stage and to provide sufficient negative voltage for a complete JFET drive. Even without a refine engineering, the SMPS showed 96% efficiency at a full load state.

Effect of the Doping Concentration and Space of Both p-Grid and Field Limiting Ring on 4H-SiC Junction Barrier Schottky Diode with Single Ion Implantation Process

The effect of the doping concentration and space of both p-grid and FLR on the electrical performances of 4H-SiC JBS diode has been investigated. A 4H-SiC JBS diode with the p-grid space of 3um, the FLR space of 3um, and the doping concentration of 5E18cm-3 showed the highest blocking voltage of 1500V.