Inés del Campo

Digital Hardware Implementation of High Dimensional Fuzzy Systems

This paper presents an algorithm to compute high dimensional piecewise linear (PWL) functions with simplicial division of the input domain, and introduces the circuit scheme for its implementation in a FPGA. It is also investigated how to modify this algorithm and implementation to compute a class of PWL fuzzy systems.

A hardware/software embedded agent for real-time control of ambient-intelligence environments

This paper presents the development of an embedded intelligent agent able to perform real-time control of ambient-intelligence environments. The system has been implemented as a system-on-programmable chip (SoPC) on a field programmable gate array (FPGA). The scheme used for realizing the intelligent agent is an adaptive neuro-fuzzy system (NFS) enhanced with a principal component analysis (PCA) pre-processor. The PCA pre-processing stage allows a reduction of the input dimensions (features) with no meaningful loss of modeling capability. As a consequence, the computational complexity of the system is significantly reduced, allowing its implementation on a single electronic device. The NFS-PCA agent has been tested with data obtained in a real ubiquitous computing environment test bed. Results obtained show that the agent is able to perform real-time control of the environment in a proactive and non-intrusive way, and also to adapt to changes of users preferences in a life-long mode.

A real-time driver identification system based on artificial neural networks and cepstral analysis

The availability of advanced driver assistance systems (ADAS), for safety and well-being, is becoming increasingly important for avoiding traffic accidents caused by fatigue, stress, or distractions. For this reason, automatic identification of a driver from among a group of various drivers (i.e. real-time driver identification) is a key factor in the development of ADAS, mainly when the drivers comfort and security is also to be taken into account. The main focus of this work is the development of embedded electronic systems for in-vehicle deployment of driver identification models. We developed a hybrid model based on artificial neural networks (ANN), and cepstral feature extraction techniques, able to recognize the driving style of different drivers. Results obtained show that the system is able to perform real-time driver identification using non-intrusive driving behavior signals such as brake pedal signals and gas pedal signals. The identification of a driver from within groups with a reduced number of drivers yields promising identification rates (e.g. 3-driver group yield 84.6%). However, real-time development of ADAS requires very fast electronic systems. To this end, an FPGA-based hardware coprocessor for acceleration of the neural classifier has been developed. The coprocessor core is able to compute the whole ANN in less than 4 μs.

Driving Behavior Signals and Machine Learning: A Personalized Driver Assistance System

The progressive integration of driver assistance systems (DAS) into vehicles in recent decades has contributed to improving the quality of the driving experience. Currently, there is a need for individualization of advanced DAS with the aim of improving safety, security and comfort of the driver. In particular, the need to adapt the vehicle to individual preferences and requirements of the driver is an important research focus. In this work, an individualized and non-intrusive monitoring system for real-time driver support is proposed. The kernel of the system is a driver identification module based on driving behavior signals and a high-performance machine learning technique. The scheme is suitable for the development of single-chip embedded systems. Moreover, most of the measurement units used in this research are nowadays available in commercial vehicles, so the deployment of the system can be performed with minimal additional cost. Experimental results using a reduced set of features are very encouraging. Identification rates greater than 75% are obtained for a working set of 11 drivers, 86% for five-driver groups, 88% for four-driver groups, and 90% for three-driver groups.

An intelligent embedded system for real-time adaptive extreme learning machine

Extreme learning machine (ELM) is an emerging approach that has attracted the attention of the research community because it outperforms conventional back-propagation feed-forward neural networks and support vector machines (SVM) in some aspects. ELM provides a robust learning algorithm, free of local minima, suitable for high speed computation, and less dependant on human intervention than the above methods. ELM is appropriate for the implementation of intelligent embedded systems with real-time learning capability. Moreover, a number of cutting-edge applications demanding a high performance solution could benefit from this approach. In this work, a scalable hardware/software architecture for ELM is presented, and the details of its implementation on a field programmable gate array (FPGA) are analyzed. The proposed solution provides high speed, small size, low power consumption, autonomy, and true capability for real-time adaptation (i.e. the learning stage is performed on-chip). The developed system is able to deal with highly demanding multiclass classification problems. Two real-world applications are presented, a benchmark problem of the Landsat images database, and a novel driver identification system for smart car applications. Experimental results that validate the proposal are provided.

SCALABLE ARCHITECTURE FOR HIGH-SPEED MULTIDIMENSIONAL FUZZY INFERENCE SYSTEMS

This paper presents a scalable architecture suitable for the implementation of high-speed fuzzy inference systems on reconfigurable hardware. The main features of the proposed architecture, based on the Takagi–Sugeno inference model, are scalability, high performance, and flexibility. A scalable fuzzy inference system (FIS) must be efficient and practical when applied to complex situations, such as multidimensional problems with a large number of membership functions and a large rule base. Several current application areas of fuzzy computation require such enhanced capabilities to deal with real-time problems (e.g., robotics, automotive control, etc.). Scalability and high performance of the proposed solution have been achieved by exploiting the inherent parallelism of the inference model, while flexibility has been obtained by applying hardware/software codesign techniques to reconfigurable hardware. Last generation reconfigurable technologies, particularly field programmable gate arrays (FPGAs), make it possible to implement the whole embedded FIS (e.g., processor core, memory blocks, peripherals, and specific hardware for fuzzy inference) on a single chip with the consequent savings in size, cost, and power consumption. As a prototyping example, we implemented a complex fuzzy controller for a vehicle semi-active suspension system composed of four three-input FIS on a single FPGA of the Xilinxs Virtex 5 device family.

A wearable human activity recognition system on a chip

The availability of cheap wearable motion and biometric sensors has favoured the research on wearable human activity recognition (HAR) systems. However, a HAR system comprehends many complex signal processing stages that usually require some computationally demanding operations which can hardly be directly performed in an embedded system. Modern FPGA technologies and the system-on-chip (SoC) approach open the door to the implementation of complex single-chip signal processing systems to produce tiny, wearable and autonomous embedded HAR systems. However, compared to a pure embedded software approach, the potentially higher performance-to-power ratio of FPGAs can only be exploited in very demanding applications and by a careful design of the implemented system. In this work we describe a first step in the consecution of an FPGA-based completely autonomous singlechip HAR system which can be adapted and optimized to the user with no need of external computing means neither of human intervention. The system includes all stages in a HAR process, i.e., signal segmentation, signal processing for feature extraction, input space dimensionality reduction (feature selection), and activity estimation by means of a neural classifier. A physical activity recognition example is used as a reference design to evaluate the performance of the system and to draw conclusions on the potential benefits of using FPGAs in future wearable HAR applications.

A fault tolerant single-chip intelligent agent with feature extraction capability

Autonomy and adaptability are key features of intelligent agents. Many applications of intelligent agents, such as the control of ambient intelligence environments and autonomous intelligent robotic systems, require the processing of information coming in from many available sensors to produce adequate output responses in changing scenarios. Autonomy, in these cases, applies not only to the ability of the agent to produce correct outputs without human guidance, but also to its ubiquity and/or portability, low-power consumption and integrability. In this sense, an embedded electronic system implementation paradigm can be applied to the design of autonomous intelligent agents in order to satisfy the above mentioned characteristics. However, processing complex computational intelligence algorithms with tight delay constraints in resource-constrained and low power embedded systems is a challenging engineering problem. In this paper a single-chip intelligent agent based on a computationally efficient neuro-fuzzy information processing core is described. The system has been endowed with an information preprocessing module based on Principal Component Analysis (PCA) that permits a substantial reduction of the input space dimensionality with little loss of modeling capability. Moreover, the PCA module has been tested as a means to achieve deep adaptability in changing environment dynamics and to endow the agent with fault tolerance in the presence of sensor failures. For data driven trials and research, a data set obtained from an experimental intelligent inhabited environment has been used as a benchmark system.

Dynamic Partial Reconfiguration in Embedded Systems for Intelligent Environments

In this paper we propose to apply the Dynamic Partial Reconfiguration (DPR) technology to embedded systems intended for Intelligent Environments. To reach this goal, we have developed a system based on a Field Programmable Gate Array (FPGA) in which high performance hardware modules can be reconfigured on-line according to the necessities of the system at each moment. Two different implementations have been carried out to measure the time required to reconfigure each module and also to measure the FPGA resources that can be saved if we keep configured only the modules that are required at each time. The Obtained results show how this technique offers advantages in cost, size and power when applied to embedded systems for intelligent environments.

A semi-active suspension embedded controller in a FPGA

This paper explores the applicability of a Piece-Wise Multilinear Fuzzy Inference System (PWM-FIS) to the realization of embedded digital controllers for semi-active suspension systems. The nonlinear controller, obtained by approximation of a modified Skyhook control strategy trough off-line training of the PWM-FIS, has been implemented in a Field Programmable Gate Array (FPGA) following a hardwaresoftware partition methodology. The system comprehends four three-input/one-output parallel fuzzy controllers, thus allowing its application to the control of a complete four-wheel vehicle suspension system. Obtained input/output latency (control signal skew) of the implemented controller is only 90ns which warrants its applicability to any suspension system with high-speed realtime advanced control requirements.