Íñigo Gutiérrez

Design of UWB folded-plate monopole antennas based on TLM

From the current distribution on planar monopoles, transmission line modeling is applied to study this kind of antennas. Some reported techniques for broadband monopoles are approached by using this model from a qualitatively point of view. Conclusions are derived that help to match the monopoles over an ultrawide bandwidth regardless of whether they are folded or not. Folded configurations are obtained in order to provide solutions to specific designs and improve radiation pattern maintaining the planar monopole broadband behavior. Three compact folded prototypes with greater than 1:38 bandwidth are implemented and tested. Pulse distortion is also discussed for this type of applications.

0.5 V and 0.43 pJ/bit Capacitive Sensor Interface for Passive Wireless Sensor Systems

This paper presents an ultra low-power and low-voltage pulse-width modulation based ratiometric capacitive sensor interface. The interface was designed and fabricated in a standard 90 nm CMOS 1P9M technology. The measurements show an effective resolution of 10 bits using 0.5 V of supply voltage. The active occupied area is only 0.0045 mm2 and the Figure of Merit (FOM), which takes into account the energy required per conversion bit, is 0.43 pJ/bit. Furthermore, the results show low sensitivity to PVT variations due to the proposed ratiometric architecture. In addition, the sensor interface was connected to a commercial pressure transducer and the measurements of the resulting complete pressure sensor show a FOM of 0.226 pJ/bit with an effective linear resolution of 7.64 bits. The results validate the use of the proposed interface as part of a pressure sensor, and its low-power and low-voltage characteristics make it suitable for wireless sensor networks and low power consumer electronics.

Simulation and measurement of a long-range passive RFID system focused on reader architecture and backscattering communication

With passive tags achieving longer read ranges, the design of a proper long-range RFID reader has become a challenging issue. A complete long-range passive RFID system, focused on the backscattering tag-to-reader communication and the reader architecture, is presented in this paper. Main reader design constraints are discussed. Guidelines to design a PSK backscatter modulator are also given. The system is not only simulated, but also fabricated and measured. Thus, both the designed reader architecture and the simulation tool are validated. A read range of 10.6 m with only an 11deg phase difference has been measured.

Low power considerations and design for CMOS VCOs applied for direct conversion receivers at 5GHz

Low power design often requires direct conversion architectures, such as low-IF or zero-IF. Any of these two possibilities needs a low power, low phase noise voltage control oscillator (VCO) in the frequency synthesizer. This work is focused on low power considerations applied to the practical modern conception of this device. Fulfilling the standard specifications (output power, phase noise, frequency range) should be completed with this deeper step. A conscious design leads moreover to an improvement in the results obtained by the classical considerations. The increase of the quality factor of the passive elements is one of the key points, followed by an accurate design of the architecture scheme. Furthermore, lower current consumption provides higher oscillation frequencies and facilitates higher frequency ranges, which follow the trends of modern wireless and wideband communication standards. In order to validate the aforementioned assumptions, a CMOS VCO has been implemented in UMC 0.18μm 1P6M technology, with power consumption down to 3.4mW.