Ioannis Drositis

Evaluation of loop grouping methods based on orthogonal projection spaces

This paper compares three similar loop-grouping methods. All methods are based on projecting the n-dimensional iteration space J/sup n/ onto a k-dimensional one, called the projected space, using (n-k) linear independent vectors. The dimension k is selected differently in each method giving various results. The projected space is divided into discrete groups of related iterations, which are assigned to different processors. Two of the methods preserve optimal time completion, by scheduling loop iterations according to the hyperplane method. The theoretical analysis of the experimental results indicates the appropriate method, for specific iteration spaces and target architectures.

Geometric scheduling of 2-D uniform dependence loops

One of the primary tasks in the area of uniform dependence loops, is predicting the execution propagation, as well as finding an optimal time schedule. In this work, the problem of scheduling using wavefront prediction is presented. The geometric concepts of time instance subspaces and execution pattern are introduced. A quite simple and low complexity scheduling algorithm is presented. The index space is split into geometric subspaces and any point can be located in them. Each point is then scheduled according to the subspace where it belongs.

Geometric scheduling of 2-D UET-UCT uniform dependence loops

Finding an optimal time schedule is one of the primary tasks in the area of parallelizing uniform dependence loops. Due to the existence of dependence vectors, the index space of such a loop, is split into subspaces of points that can be executed at different time instances. The geometric representation of these sets form certain polygonal shapes called patterns, with special attributes and characteristics. In this paper we present a scheduling technique that is based on the geometric attributes of the index space and the dependence vector set. Our strategy can be applied to architectures that consider unit execution-zero communication delay (UET) or unit execution-unit communication (UET-UCT) model, as a new method for transforming UET-UCT problems to UET equivalent ones is presented.

A SYSTOLIC APPROACH TO LOOP PARTITIONING AND MAPPING INTO FIXED SIZE DISTRIBUTED MEMORY ARCHITECTURES

This paper presents a new method for the problem of mapping of nested FOR-loops with uniform dependencies, into mesh-connected parallel architectures. This method is based on loop mapping for systolic arrays. The virtual array of cells is derived from the index space, by applying a linear transformation. This array is divided (cut) into a fixed number of clusters, equal to the number of available real processors. The basic idea of our method is that the cutting is performed along properly selected boundary directions, so as to minimize inter-cluster communication and equilibrate the number of virtual cells for every cluster. Each cluster is then assigned to a different processor, which performs in a roughly independent manner, as the communication requirements are now minimized. This mapping cuts down overall communication delays, while using a fixed number of processors from a (n-1)-dimensional mesh-connected distributed architecture.