Isaac Chan

Thin film imaging technology on glass and plastic

Hydrogenated amorphous silicon (a-Si:H) technology offers a viable technological alternative for improved imaging of optical signals and high energy radiation. This paper reviews X-ray imaging technology in terms of detector operating principles, including optoelectronic characteristics, and fabrication process issues related to pixel (Schottky diode detector plus thin film transistor) integration. Recent results which describe the extension of the current fabrication processes to low (/spl sim/120/spl deg/C) temperature are also presented. The low temperature processing enables fabrication of thin electronics on flexible (polymer) substrates.

A-Si Amoled Display Backplanes on Flexible Substrates

In view of its maturity and low-cost, the amorphous silicon (a-Si) technology is an attractive candidate for active matrix organic light emitting diode (AMOLED) display backplanes on flexible substrates. However, the a-Si material comes with significant intrinsic shortcomings related to speed (mobility) and stability of operation, requiring novel threshold-voltage-shift (δVT) compensated thin-film transistor (TFT) pixel circuits and architectures to enable stable OLED operation. But given the dramatic progress in efficiency of OLED materials over recent years, the drive current requirement has been significantly lowered, thus relaxing the constraints on a-Si TFTs. For compatibility to plastic substrates, the a-Si TFT process temperature must be reduced from the conventional 300°C to ∼150°C or below, which tends to compromise the integrity of thin-film materials and device performance. Hence, optimizing the TFT process for high device performance with limited thermal budget is a necessary step towards flexible AMOLEDs with a-Si backplanes. This paper reviews the design and process challenges, and specifically examines the performance of TFTs and δVT- compensated integrated pixel driver circuits on plastic substrates with respect to current driving ability and long term stability. More importantly, lifetime tests of circuit degradation behaviour over extended time periods demonstrate highly stable drive currents and its ability to meet commercial standards.

Amorphous silicon thin-film transistors with 90° vertical nanoscale channel

This letter reports 100nm channel length vertical thin-film transistors (VTFTs) in hydrogenated amorphous silicon (a-Si:H) technology. The channel length is defined by means of a dielectric film thickness, realized by an anisotropic reactive ion etching process to yield a 90° vertical transistor structure. Furthermore, the device area of the vertical TFT structure is less than ∼1∕3 that of the ubiquitous lateral TFT structure. The 100nm channel length VTFTs exhibit an ON/OFF current ratio of 108, a threshold voltage of 2.8V, and a subthreshold slope of 0.8V∕dec.

150

This paper reports on hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) processed at 150°C using plasma-enhanced chemical vapor deposition on polyethylene naphthalate (PEN) transparent plastic substrates. We examine the impact of RF deposition power on film stress of amorphous silicon nitride (a-SiNx:H), and resulting TFT performance. Transistors with the lowest stress nitride, yield the best performance in terms of device mobility (~1.1 cm2/V·s), ON/OFF current ratio (~1010) , and gate leakage current (<; 0.1 pA). Stable TFTs are demonstrated with a threshold voltage shift of less than 0.8 V following 10 hours of DC bias stress at 10 V.

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In this paper, the authors propose a mechanically flexible direct conversion x-ray detector as a potential solution for portable and conformal digital x-ray imaging. It consists of a micropillar structured layer of 100-μm-thick amorphous selenium (a-Se) on a flexible thin film transistor (TFT) backplane with a pixel size of 70 μm as a substrate. The flexible substrate is made of an optically transparent polyimide with a heat resistance of more than 200 °C. It is bonded on a glass carrier for rigid substrate handling during the amorphous silicon (a-Si) TFT process. Separating the flexible substrate from the glass carrier is partly facilitated by a debonding layer sandwiched between them. A two-dimensional electrical simulation analysis revealed a possible charge generation and collection mechanism within the micropillared a-Se layer. An x-ray image captured by the curved flexible detector indicated that a pillarlike a-Se conversion layer can be used to perform x-ray imaging. This is, to the best of our kno...

C Amorphous Silicon Thin Film Transistors With Low-Stress Nitride on Transparent Plastic

X-ray phosphor films based on composite materials, for conversion of x rays into visible light, have been synthesized for large area imaging applications. Here the major components are gadolinium oxysulfide doped with terbium (Gd2O2S:Tb), polyvinyl alcohol and water. A small amount of additives (ethylene glycol and sulfonated type agents) were incorporated to disintegrate aggregated phosphor powders and to minimize coating defects. The films, with thicknesses ranging from 380 to 1100 μm and phosphor grain size of 10 μm, were deposited onto glass substrates. The coating quality of the films was evaluated via confocal laser beam scanning microscopy. The x-ray absorption efficiency and the green light emission intensity of the films were measured as functions of film thickness and x-ray source voltage.

Flexible x-ray imaging detector based on direct conversion in amorphous selenium

This paper presents results of a systematic investigation of the impact of film thickness on leakage current and electrical breakdown of plasma enhanced chemical vapor deposited (PECVD) silicon nitride (SiNx). We consider SiNx films of various thicknesses, in the range 50 to 300 nm, deposited on both planar and vertical sidewalls in resemblance to the structural topology of the vertical thin film transistor (VTFT). The electrical breakdown strength for 150-300 nm thick films was approximately 7 MV/cm, while the value dropped to ~3 MV/cm for 50 nm thick films deposited under the same process conditions. In all cases, failure is inevitably accompanied by an increase in pinhole density. The results show that the reliability and leakage current of the gate dielectric in vertical thin film transistors depends on the step coverage of the SiNx on the vertical sidewall.

X-ray phosphor deposition technology for co-integration with amorphous silicon imaging arrays

This article reports the design of vertical thin film transistors (VTFTs) in hydrogenated amorphous silicon (a-Si:H) technology. This transistor structure offers an elegant method of defining the channel length in nanoscale dimensions by means of dielectric film thickness. In addition, the device area of the vertical TFT structure is less than ∼1∕3 that of the ubiquitous lateral TFT structure. We study the deposition mechanisms to gain insight into the fabrication of VTFTs from a conceptual standpoint. The a-Si:H VTFT reported here advances current state of the art, by demonstrating the first 100nm channel length VTFT with an on/off current ratio of 108, threshold voltage of 2.8V, and a subthreshold slope of 0.8V∕decade. This is the shortest and truly vertical channel a-Si:H TFT reported, hitherto. We propose an application of a-Si:H VTFTs in high-resolution flat-panel electronics with TFT size independent fill factor, promising immense benefits in medical x-ray imaging.

Reliability of Silicon Nitride Gate Dielectric in Vertical Thin-Film Transistors

In this article we discuss the impact of channel length scaling on the above threshold current characteristics of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs). MEDICI simulation results of the interface surface potential show a lowering of the potential barrier for shorter channel lengths. This suggests a decrease in threshold voltage and increase in subthreshold slope with drain voltage particularly in submicron channel lengths, causing a nonsaturating output current. Simulation results of the above threshold current-voltage characteristics for short channel TFTs corroborate with measurement data of fabricated devices.

Nanoscale channel and small area amorphous silicon vertical thin film transistor

In this article, we present an optimized thick film photoresist process to compensate for issues such as step coverage, linewidth variations, and long dry etch resistance for hydrogenated amorphous silicon (a-Si:H) devices, such as vertical thin film transistors (VTFTs) with significant substrate topography (1 μm or higher). This article describes a systematic approach to develop an optical lithographic process along with practical process models to analyze the key parameters that control the process throughput and resist charactersistics. The resist performance in dry etching and linewidth control over the topographic structure of VTFTs accompanied with the electrical characteristics of the fabricated device are demonstrated.